ESP-IDF 1.0 Release plan

MalteJ
Posts: 24
Joined: Wed Sep 21, 2016 10:26 pm

Re: ESP-IDF 1.0 Release plan

Postby MalteJ » Mon Dec 05, 2016 10:21 am

ESP_igrr wrote:jmattsson: Interrupt allocation is going to be in master any day now. It's been reviewed already and we just need to do a few more tests with drivers which use it.


A big thanks to the Espressif Team!

I agree with jmattsson, if you already know there is an API change coming, then please do it as soon as possible! No one is relying on the API yet, so it's a great time to change something ;)

Regarding I2C - I'd love to see this feature soon, as we need it in our application!

Thank you!
Malte

ESP_igrr
Posts: 219
Joined: Tue Dec 01, 2015 8:37 am

Re: ESP-IDF 1.0 Release plan

Postby ESP_igrr » Mon Dec 05, 2016 11:08 am

Ritesh wrote:Do you have idea about when you guys are planning to release ESP-idf RTOS SDK with I2C Driver and RF Analysis features as we need it ASAP in my project?


For I2C, I can't give you a date. As I mentioned a few posts above, we are doing some planning this week, and I will post updated release plan as soon it is available.

Can you elaborate what are the "RF Analysis features"? We don't have anything like this on our software roadmap.

MalteJ
Posts: 24
Joined: Wed Sep 21, 2016 10:26 pm

Re: ESP-IDF 1.0 Release plan

Postby MalteJ » Mon Dec 05, 2016 12:01 pm

ESP_igrr wrote:
Ritesh wrote:Can you elaborate what are the "RF Analysis features"? We don't have anything like this on our software roadmap.


I think he's talking about labtools that help during CE and WiFi certification.

Ritesh
Posts: 144
Joined: Tue Sep 06, 2016 9:37 am
Location: India
Contact:

Re: ESP-IDF 1.0 Release plan

Postby Ritesh » Mon Dec 05, 2016 12:12 pm

ESP_igrr wrote:
Ritesh wrote:Do you have idea about when you guys are planning to release ESP-idf RTOS SDK with I2C Driver and RF Analysis features as we need it ASAP in my project?


For I2C, I can't give you a date. As I mentioned a few posts above, we are doing some planning this week, and I will post updated release plan as soon it is available.

Can you elaborate what are the "RF Analysis features"? We don't have anything like this on our software roadmap.


Hi,

I am asking for "RF init and calibration data handling" which is already in your Road-map as per your first Release Plan 1.0
Regards,
Ritesh Prajapati

Ritesh
Posts: 144
Joined: Tue Sep 06, 2016 9:37 am
Location: India
Contact:

Re: ESP-IDF 1.0 Release plan

Postby Ritesh » Mon Dec 05, 2016 12:15 pm

MalteJ wrote:
ESP_igrr wrote:
Ritesh wrote:Can you elaborate what are the "RF Analysis features"? We don't have anything like this on our software roadmap.


I think he's talking about labtools that help during CE and WiFi certification.


Hi,

Yes. You are correct as we have already started to develop our product based on ESP32 chip and we need to plan for our product CE certification as well.

So, we need some informations in form of API and document for "RF init and calibration data handling" for our product CE certification as well.
Regards,
Ritesh Prajapati

lpchler
Posts: 2
Joined: Thu Dec 01, 2016 10:04 am

Re: ESP-IDF 1.0 Release plan

Postby lpchler » Mon Dec 05, 2016 12:40 pm

Hello,
I'm glad ethernet made it in to the new release. :)

Are there any hardware reference designs for ethernet available yet? I've searched thru the docs, but I couldn't even find a part number...

Thanks :)

ESP_igrr
Posts: 219
Joined: Tue Dec 01, 2015 8:37 am

Re: ESP-IDF 1.0 Release plan

Postby ESP_igrr » Mon Dec 05, 2016 1:21 pm

Ritesh: "RF init and calibration data handling" has been merged into master a couple of weeks ago. This feature includes automatic calibration of ESP32 radio, and storage of calibration parameters in the NVS partition. This doesn't include any analysis features. It is also entirely unrelated to FCC/CE certification flow.

There are certification tools and document available for download from Espressif website:
http://download.espressif.com/FCC_CE_Test/ESP32_Certification_and_Test_EN_20161202.zip


lpchler: design of an Ethernet development board is underway. The PHY chip used on our current board is TLK110. Chances are, the same one will be used for the new reference design. Once the reference design is completed, we will post it on Espressif website and also make an announcement on the forum.

lpchler
Posts: 2
Joined: Thu Dec 01, 2016 10:04 am

Re: ESP-IDF 1.0 Release plan

Postby lpchler » Mon Dec 05, 2016 2:02 pm

ESP_igrr:
Thanks for the fast response.

Sounds great, how much time you will need approximately to finish it? :)

ESP_igrr
Posts: 219
Joined: Tue Dec 01, 2015 8:37 am

Re: ESP-IDF 1.0 Release plan

Postby ESP_igrr » Mon Dec 05, 2016 2:49 pm

The current plan is to complete the design in three weeks.

Ritesh
Posts: 144
Joined: Tue Sep 06, 2016 9:37 am
Location: India
Contact:

Re: ESP-IDF 1.0 Release plan

Postby Ritesh » Tue Dec 06, 2016 4:22 am

Hi,

As I have checked into latest following ESP32-idf Repository and found that there are commits of till last Friday.

https://github.com/espressif/esp-idf

So, ESP32-idf Release 1.0 features will be included into same GIT Repository or Espressif Systems are planning to create seperate repository for that.

Please let me know if anyone has any idea for that.
Regards,
Ritesh Prajapati

Who is online

Users browsing this forum: No registered users and 2 guests