Search found 157 matches
- Mon Jun 15, 2026 5:55 am
- Forum: ESP-IDF 中文讨论版
- Topic: ESP32-S3 SPI DMA
- Replies: 5
- Views: 231
Re: ESP32-S3 SPI DMA
非常感谢,附件是ADC规格书,你的想法非常有创意,我感觉理论上能行的通,CS其实和CNV是同一个pin,RMT通过一个IO来产生CS信号,然后这个IO要连接到ESP32配置的slave的cs pin上,也一起连到ADC的CNV(CS)上,是这么回事吧?
Well, something like this: RMT generates a CS and a CLK.
They connect to the ESP and ADC. Both devices operate in slave mode, with only one transmitting data and the ...
- Wed Jun 10, 2026 3:44 pm
- Forum: ESP-IDF 中文讨论版
- Topic: ESP32-S3 SPI DMA
- Replies: 5
- Views: 231
Re: ESP32-S3 SPI DMA
Unfortunately, I couldn't find the datasheet for your ADC.
Technically, both the ESP and ADC will become slave devices, while the RMT generates CS and SCLC and acts as the master.
The ESP only needs SCLC, while the ADC needs CS and SCLC (and possibly also CONV). Run SPI DMA, everyone waits for CS ...
Technically, both the ESP and ADC will become slave devices, while the RMT generates CS and SCLC and acts as the master.
The ESP only needs SCLC, while the ADC needs CS and SCLC (and possibly also CONV). Run SPI DMA, everyone waits for CS ...
- Tue Jun 09, 2026 6:49 am
- Forum: ESP-IDF 中文讨论版
- Topic: ESP32-S3 SPI DMA
- Replies: 5
- Views: 231
Re: ESP32-S3 SPI DMA
hi
Try switching to slave DMA mode, create external SCL and СS, for example using RMT.
or, more correctly, DMA-Controlled Configurable Segmented Transfer
Try switching to slave DMA mode, create external SCL and СS, for example using RMT.
or, more correctly, DMA-Controlled Configurable Segmented Transfer
- Wed May 06, 2026 2:13 pm
- Forum: ESP-IDF
- Topic: World Controller ESP32s3
- Replies: 9
- Views: 1373
Re: World Controller ESP32s3
You can read the section
Chapter 15 Permission Control (PMS)
https://documentation.espressif.com/esp32-s3_technical_reference_manual_en.pdf
You can lock any block of registers and memory sections from being modified, and then block the ability to unlock these sections until the next processor ...
Chapter 15 Permission Control (PMS)
https://documentation.espressif.com/esp32-s3_technical_reference_manual_en.pdf
You can lock any block of registers and memory sections from being modified, and then block the ability to unlock these sections until the next processor ...
- Tue Apr 07, 2026 2:53 am
- Forum: General Discussion
- Topic: Has anyone used ESP32-S3 to capture an external RGB LCD bus passively?
- Replies: 5
- Views: 216
Re: Has anyone used ESP32-S3 to capture an external RGB LCD bus passively?
Hi
I don't see much difference in the processing of PCLK HSYNC VSYNC DE synchronization signals between a real camera and an LCD.
You'll have a different problem. According to the datasheet, PCLK is 80+- MHz. The 16-bit LCDCAM ESP32S3 module can receive a maximum frequency of 16 bits, 40 MHz (8 bits ...
I don't see much difference in the processing of PCLK HSYNC VSYNC DE synchronization signals between a real camera and an LCD.
You'll have a different problem. According to the datasheet, PCLK is 80+- MHz. The 16-bit LCDCAM ESP32S3 module can receive a maximum frequency of 16 bits, 40 MHz (8 bits ...
- Fri Apr 03, 2026 3:21 am
- Forum: ESP-IDF
- Topic: Slow DMA compared to memcpy()
- Replies: 3
- Views: 92
Re: Slow DMA compared to memcpy()
I haven't measured the M2M speeds for the ESP32P4.
For the ESP32S3, you can see speed comparisons here.
viewtopic.php?t=36808
esp_async_memcpy - as far as I remember, it's GDMA.
For the ESP32S3, you can see speed comparisons here.
viewtopic.php?t=36808
esp_async_memcpy - as far as I remember, it's GDMA.
- Fri Apr 03, 2026 2:46 am
- Forum: ESP-IDF
- Topic: Slow DMA compared to memcpy()
- Replies: 3
- Views: 92
Re: Slow DMA compared to memcpy()
Hi
GDMA is obviously slower than memcpy.
1. The data transfer goes through the APB bus, which is slower than direct RAM transfer.
2. High overhead when transferring GDMA m2m (descriptor allocation with alignment, cache synchronization).
However, up to 40 MB/sec on Spiram (RAM) M2M should work. (At ...
GDMA is obviously slower than memcpy.
1. The data transfer goes through the APB bus, which is slower than direct RAM transfer.
2. High overhead when transferring GDMA m2m (descriptor allocation with alignment, cache synchronization).
However, up to 40 MB/sec on Spiram (RAM) M2M should work. (At ...
- Thu Feb 19, 2026 3:04 am
- Forum: General Discussion
- Topic: General Purpose Parallel Interface for high speed external ADC Reading
- Replies: 2
- Views: 221
Re: General Purpose Parallel Interface for high speed external ADC Reading
Now the S3 has no general purpose parallel interface, now my question would be can i repurpose the camera interface to read the ADC?
You can use this as a basic example:
https://esp32.com/viewtopic.php?t=33876
https://github.com/ok-home/logic_analyzer
This example allows you to capture 8 ...
- Mon Feb 16, 2026 7:47 am
- Forum: ESP-IDF
- Topic: Can IO MUX be used to connect two gpio pins instead of internal peripheral to GPIO?
- Replies: 1
- Views: 71
Re: Can IO MUX be used to connect two gpio pins instead of internal peripheral to GPIO?
If you're happy with translating the input GPIO to the output GPIO, there are special signals in the multiplexer for this.
For example, for the ESP32S3, this is...
There is a range of peripheral output signals (208 ~ 212 in Table 6.11-1) which are not connected to any peripheral, but
to the input ...
For example, for the ESP32S3, this is...
There is a range of peripheral output signals (208 ~ 212 in Table 6.11-1) which are not connected to any peripheral, but
to the input ...
- Fri Feb 06, 2026 1:28 am
- Forum: General Discussion
- Topic: RMT callback is not generated reliably
- Replies: 4
- Views: 832
Re: RMT callback is not generated reliably
Why so complicated?
// synchronize sending of all channels
rmt_new_sync_manager(...)
....
while(1){
// prepare data
....
// transmit data
rmt_transmit(ch0...);
rmt_transmit(ch1...);
rmt_transmit(ch2...);
// wait for all channels to finish transmitting
rmt_tx_wait_all_done(ch0...);
rmt_tx_wait_all ...
// synchronize sending of all channels
rmt_new_sync_manager(...)
....
while(1){
// prepare data
....
// transmit data
rmt_transmit(ch0...);
rmt_transmit(ch1...);
rmt_transmit(ch2...);
// wait for all channels to finish transmitting
rmt_tx_wait_all_done(ch0...);
rmt_tx_wait_all ...