We actually have a P4 based product ( https://www.arcadeshop.com/i/1758/p4-po ... me-kit.htm ) using this module https://en.wireless-tag.com/product-item-56.html

Of course it would be nice if we would not need to depend on a 3rd party but it is not the end of the world

https://www.cnx-software.com/2026/01/07/espressif-systems-showcases-esp32-e22-wi-fi-6e-soc-and-esp32-h21-ble-mcu-for-battery-powered-devices/

Now I kind of want a P4 successor with these 500MHz cores and the 1MB internal RAM. But still keep the PSRAM and the other P4 features. Like the additional ...

There was a blog post about the P4 PIE some time ago: https://developer.espressif.com/blog/20 ... roduction/

This choice of name is going to be causing confusion down the road though. The S2 and the S3 have a lot in common, and the S3 can be reasonably seen as an extended version of the S2; the S31 is a completely different chip, i.e. the step between S2 and S3 is much smaller than between S3 and S31 ...

some food for thought: if a new product would not have radios, wouldn't it make more sense to call it the ESP32-P41?

If a new product would be RISC-V with radios, wouldn't it make sense to call it ESP32-C7? ;-)


I would assume the idea is to replace the current S3 so it can be set to "Not ...

Well, at least the Interrupt list contains quite some interrupts for a a modem with wifi, bt and ble.

volatile interrupt_core0_modem_wifi_mac_intr_map_reg_t modem_wifi_mac_intr_map;
volatile interrupt_core0_modem_wifi_mac_nmi_intr_map_reg_t modem_wifi_mac_nmi_intr_map;
volatile interrupt_core0 ...

Based on what else is in this folder I would say the HP parts is a 400MHz dual core Risc V. So more or less what we kow from the P4 I would assume. Which make sense as it was stated before that the Xtensa core will be faced out for new chips.

It also looks like there is more GPIOs. Full range from ...

I have spotted it, too. Based on what is in the IDF it looks kind of a mix of the P4 and S3 with some more extras.

ECO troubles. Basically, the current silicon isn't capable of running at 360MHz in the operating ranges we specify for them. An ECO that fixes that is in the pipeline; after that I expect the part to get more devboards. Because of the complexity of that ECO, it's taken us a while, though.


I am ...

Thank you for the updated reference manual. As I often have special cases that are not covered by the regular drivers it is a great help.

The new release includes the Dedicated IO as chapter 1.13.2. I am under the impression that it was copied from another chip and not modified. Based on the values ...