Hi, it seems to be more like a HW problem of your setup. 8 inches (~20 cm) long wires are too long. RMII CLK is 50 MHz so signal integrity is an concern, see https://resources.pcb.cadence.com/blog/2019-mii-and-rmii-routing-guidelines-for-ethernet I have experience that ~5 cm log wires still work ...

I couldn't attach more photos in my original post, so here's a capture of the nonsense double stop condition after an address/command NAK.
2024-09-24 12_15_25-Logic 2 [Logic 8 - Connected] [I2C fail with REFCLKO_3].png

Here is an Ethernet capture from Wireshark (monitored from KSZ8633's PHY 2 ...

We're attempting to prototype the KSZ8863 Daughter Board with an ESP32-PICO-DevKitM-2 . We started with the KSZ8863 Ethernet Driver (beta) and have made the following configurations/modifications:
Configured the simple switch example for I2C client mode.
Added an I2C write to the example code to ...

Can someone explain what SPI_FLASH_ERASE_YIELD_DURATION_MS and CONFIG_SPI_FLASH_ERASE_YIELD_TICKS do? The descriptions from docs.espressif.com are not worded very well and almost sound exactly the same. Is CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS the amount of time passed to vTaskDelay() at the end ...

how a CPU yield is supposedly accomplished

vTaskDelay(...) is how this kind of yielding is done.


You're right. I guess this is why I'm confused why the original example code was still triggering the watchdog timeout when attempting to erase all 16 Mbytes (in blocks of 64 kbytes) in a single ...

If you access the external flash over the same SPI bus which the internal flash uses I'm not sure that's even possible. If the CPU kept running other tasks it would likely have to fetch instructions from the internal flash at some point, which won't work while the SPI bus is in use for the ...

I'd suggest trying to erase in multiple smaller ranges instead of all at once, like


Your suggestion does fix the immediate problem. The example works now that we're manually ensuring a single call to esp_partition_erase_range will not last longer than the task watchdog timeout.

Our concerns ...

We're currently prototyping the addition of an external flash chip (Winbond W25Q128JV) to an ESP32-PICO-V3-02 and basing it off of the FAT FS on External Flash example . The manufacturer ID, device ID, and memory size are read correctly during initialization, but the idle task watchdog eventually ...

I couldn't attach the sdkconfig to my original post for some reason, so here it is.

We're running ESP-IDF v5.0.3. Is there some generic setting in the sdkconfig that would prevent the stack trace from being displayed on a panic? As you can see in the image below, it does not show the call stack leading up to esp_system_abort(). The details variable simply describes the address of ...