Search found 9 matches

by HaydosR
Sat Mar 15, 2025 9:46 pm
Forum: ESP-IDF
Topic: uart half duplex one line
Replies: 9
Views: 10210

Re: uart half duplex one line

Direct connection between the esp gpio and the attiny updi/reset pin.

10K pull-up near the attiny to let it power on (100nF cap had to be removed as it screwed with updi comms)

No internal pullups or pulldowns enabled on the esp gpio
by HaydosR
Wed Mar 12, 2025 4:36 am
Forum: Hardware
Topic: IS25LP032D-JKLE Issues With Bootloader
Replies: 2
Views: 1220

Re: IS25LP032D-JKLE Issues With Bootloader

Issue was the SPI Flash speed, which had to be set to 40Mhz, auto settings defaulted to 80Mhz which was too fast for this chip (Max 50Mhz from the datasheet)
by HaydosR
Fri Mar 07, 2025 4:55 am
Forum: ESP-IDF
Topic: uart half duplex one line
Replies: 9
Views: 10210

Re: uart half duplex one line

We got this working several months ago but forgot to update. Hope its not too late to help. Have no problems flashing an ATTINY1616 anywhere from 9600 baud to 230400 baud

Can't give exact source code but:
```
bool COM_Open(const updiprog_com_port_t com_port) {
esp_err_t err;

// Configure UPDI ...
by HaydosR
Wed Mar 05, 2025 2:17 am
Forum: Hardware
Topic: IS25LP032D-JKLE Issues With Bootloader
Replies: 2
Views: 1220

Re: IS25LP032D-JKLE Issues With Bootloader

idf.py menuconfig and latest test Logs attached
by HaydosR
Wed Mar 05, 2025 2:04 am
Forum: Hardware
Topic: IS25LP032D-JKLE Issues With Bootloader
Replies: 2
Views: 1220

IS25LP032D-JKLE Issues With Bootloader

I've made a custom board using an ESP32-S3 processor that I'm having trouble flashing code onto.

Its currently using IS25LP032D-JKLE which is giving me Stage 2 bootloader checksum issues, even after a full-chip erase. When prototype boards were made using W25Q32JVZPIQ there were no issues, but with ...
by HaydosR
Tue Sep 10, 2024 10:25 pm
Forum: ESP-IDF
Topic: ESP32-S3 Delay Enumeration of 2nd USB CDC Port
Replies: 3
Views: 2058

Re: ESP32-S3 Delay Enumeration of 2nd USB CDC Port

I hadn't considered that process, but with what you've described I may be out of luck.

I guess this question is more Windows specific / less ESP32, but do you have any suggestions on how the 2 ports could be differentiated.

Is it possible (though probably not advisable) for one CDC descriptor to ...
by HaydosR
Tue Sep 10, 2024 1:47 am
Forum: ESP-IDF
Topic: ESP32-S3 Delay Enumeration of 2nd USB CDC Port
Replies: 3
Views: 2058

ESP32-S3 Delay Enumeration of 2nd USB CDC Port

Hi,

I'm developing a product around an ESP32-S3 module (WROOM) that registers 2 USB CDC Ports on the attached Windows computer (industrial application, the device will always be plugged into a Windows computer).

For the sake of easily configuring software on the Windows machine, I'd like the ...
by HaydosR
Wed May 29, 2024 12:42 am
Forum: ESP-IDF
Topic: uart half duplex one line
Replies: 9
Views: 10210

Re: uart half duplex one line

Interested in this also - have a board with an ESP32-S3 main processor and an Attiny1616 for background input monitoring. Would love to be able to UPDI program the Attiny via the ESP.

Don't have any suggestions unfortunately. Just leaving a comment to get notified of replies
by HaydosR
Fri Sep 02, 2022 6:44 am
Forum: ESP-IDF
Topic: ESP32-S3 Inccorectly reporting Deepsleep Wakeup Reason
Replies: 2
Views: 2058

ESP32-S3 Inccorectly reporting Deepsleep Wakeup Reason

Hi,

I have a customboard running an ESP32-S3 WROOM Module. One line on this module is linked to an external button with a pull-up resistor on GPIO13 and I want this button to operate as a DeepSleep wakeup source.

For the majority of the time, the board wakes and reports that the button was ...

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