Search found 65 matches

by cnlohr
Sat Feb 03, 2024 3:06 am
Forum: General Discussion
Topic: esptool.py in 'C'
Replies: 5
Views: 4879

Re: esptool.py in 'C'

I know I'm necroing a thread, but, because Google refuses to index the real project when you search for this and you get this thread instead, I wanted to post the link to this tool: https://github.com/cpq/esputil This is a C version of esptool.py, that has no dependencies and just works on OSX, Linu...
by cnlohr
Wed Sep 06, 2023 6:38 am
Forum: ESP-IDF
Topic: I2C Clock Flush
Replies: 3
Views: 798

Re: I2C Clock Flush

This is not an uncommon error state in a single-master system. If the host is reset at a bad time, i.e. when a slave was sending a 0 bit on the SDA. int gpio_no = 41; // Shake any device off the bus. int i; for( i = 0; i < 16; i++ ) { gpio_matrix_out( gpio_no, 256, 1, 0 ); GPIO.out1_w1tc.val = (1<<(...
by cnlohr
Wed Sep 06, 2023 6:01 am
Forum: ESP-IDF
Topic: I2C Clock Flush
Replies: 3
Views: 798

I2C Clock Flush

When using I2C, sometimes downstream devices are in the middle of a transaction when the ESP resets. This causes them to hold the SDA line low, while the SCL line is high, which apparently confuses the ESP I2C stack? Is there a proper way to "flush" I2C transactions by toggling the clock line severa...
by cnlohr
Thu Jan 26, 2023 6:42 pm
Forum: ESP-IDF
Topic: ESP32-S2 I2S Larger-than-32-bit word sizes
Replies: 2
Views: 1043

Re: ESP32-S2 I2S Larger-than-32-bit word sizes

I could, but it would be very difficult to make this work without the APLL, which as far as I understand has been dropped from the S3 :-/. It may be worth fabbing up an S3 board to give it a shot to see if I can make it work with a clunkier clock. I will just try to duplex it. At least as of yesterd...
by cnlohr
Thu Jan 26, 2023 1:22 am
Forum: ESP-IDF
Topic: ESP32-S2 I2S Larger-than-32-bit word sizes
Replies: 2
Views: 1043

ESP32-S2 I2S Larger-than-32-bit word sizes

I have a situation where I need to output a WS clock that is over a cadence of 512 bits not 32- or 64- per flip. Is there some mechanism that can be used to provide a WS clock that is of a wider bit width? One idea I had was to use the I2S engine in duplex mode, and shift out the "ideal" WS, but tha...
by cnlohr
Sat Jan 21, 2023 10:41 am
Forum: General Discussion
Topic: ESP32-S2 ULP-RISC-V clock frequency? Microsecond delay
Replies: 2
Views: 3099

Re: ESP32-S2 ULP-RISC-V clock frequency? Microsecond delay

Also, in case anyone else was peaking around here... It looks like the FSM is pretty fast, but I/O with the FSM is even slower than the RISC-V :(. Looks like ~12 cycles to set or clear any bits. Jumps are ~4 cycles.
by cnlohr
Sat Jan 21, 2023 8:49 am
Forum: General Discussion
Topic: ESP32-S2 ULP-RISC-V clock frequency? Microsecond delay
Replies: 2
Views: 3099

Re: ESP32-S2 ULP-RISC-V clock frequency? Microsecond delay

I did some tests on this myself. And in general I'm finding it takes 7 to 9 cycles per `sw` instruction depending on instruction alignment, with either a 10MHz clock (if you use the XTAL divider) or a variable clock between about 6MHz and 10.5MHz if you use the RC filter, with the undocumented tunin...
by cnlohr
Sat Jan 21, 2023 1:25 am
Forum: General Discussion
Topic: Reboot from ESP32S2 USB TTY ACM Bootloader
Replies: 5
Views: 2405

Re: Reboot from ESP32S2 USB TTY ACM Bootloader

I know I'm late here, but if anyone else was wondering, you can force this by: // Maybe we need to consider tweaking these? chip_usb_set_persist_flags( 0 ); //NOT USBDC_PERSIST_ENA (1<<31) // We **must** unset this, otherwise we'll end up back in the bootloader. REG_WRITE(RTC_CNTL_OPTION1_REG, 0); v...
by cnlohr
Sat Jan 21, 2023 12:00 am
Forum: ESP-IDF
Topic: Pre-flash and post-flash build steps [un-solved]
Replies: 5
Views: 2505

Re: Pre-flash and post-flash build steps [un-solved]

I am having an issue with this again. Now when I include the above code, I get this error: CMake Error at CMakeLists.txt:20 (add_dependencies): Cannot add target-level dependencies to non-existent target "flash". The add_dependencies works for top-level logical targets created by the add_executable,...
by cnlohr
Fri Sep 09, 2022 5:36 am
Forum: ESP-IDF
Topic: Pre-flash and post-flash build steps [un-solved]
Replies: 5
Views: 2505

Re: Pre-flash and post-flash build steps

Thank you! This worked wonders.