Search found 5 matches
- Mon Oct 06, 2025 9:39 am
- Forum: General Discussion
- Topic: ESP32-P4 bootloop after enabling flash encryption
- Replies: 1
- Views: 862
Re: ESP32-P4 bootloop after enabling flash encryption
Okay so the issue was the fact that i was flashing the bootloader that wrong address, it needs to be 0x2000 instead of 0x0.
- Mon Oct 06, 2025 7:40 am
- Forum: General Discussion
- Topic: ESP32-P4 bootloop after enabling flash encryption
- Replies: 1
- Views: 862
ESP32-P4 bootloop after enabling flash encryption
Hi all, first a small introduction, I have a project that runs no issues on the ESP32-S3 RGB LCD modules (yellow pcb lcds), encryption i s enabled in development mode, no issues reflashing them via OTA or Serial.
Now to the problem, i have gotten myself one of these newer ESP32-P4NRW32 + C6 lcds ...
Now to the problem, i have gotten myself one of these newer ESP32-P4NRW32 + C6 lcds ...
- Sun Jan 05, 2025 4:58 pm
- Forum: General Discussion
- Topic: ESP32-S3 and overclocking potential.
- Replies: 7
- Views: 5352
Re: ESP32-S3 and overclocking potential.
You cna just select that in the latest ArduinoIDE Tools menu.

- Mon Dec 23, 2024 5:47 am
- Forum: General Discussion
- Topic: ESP32-S3 and overclocking potential.
- Replies: 7
- Views: 5352
Re: ESP32-S3 and overclocking potential.
Thanks for the replies guys, been looking more into this issue and it seems it's fairly widespread across the whole RGB displays lineup, the issue seems to be related to the DMA and interrupt routines.
Here's a quote i found in the tasmota docs, they actually reserved a small section to the ...
Here's a quote i found in the tasmota docs, they actually reserved a small section to the ...
- Thu Dec 19, 2024 12:20 pm
- Forum: General Discussion
- Topic: ESP32-S3 and overclocking potential.
- Replies: 7
- Views: 5352
ESP32-S3 and overclocking potential.
Hi all - so long story short is that i have a fairly complex project on one of the 4.3" ESP32-S3 based LCDs (8MB OPI PSRAM and 16MB QSPI Flash) where i'm running a LVGL interface that writes to a 800x480 IPS panel pinned to one core and a webserver serving a web interface pinned to the other core ...