Perfect, thank you for the help!"21.2.2 Downstream JTAG Enable Mode" in the ESP32S3 TRM may be helpful.
Search found 3 matches
- Sun Apr 20, 2025 9:00 am
- Forum: ESP-IDF
- Topic: Disabling JTAG using Efuses
- Replies: 2
- Views: 241
Re: Disabling JTAG using Efuses
- Sat Apr 19, 2025 8:48 pm
- Forum: ESP-IDF
- Topic: Disabling JTAG using Efuses
- Replies: 2
- Views: 241
Disabling JTAG using Efuses
Hi,
For reference I am working with an ESP32S3 module on a custom PCB. As the PCB was required to be small we decided to completely remove the USB-to-Serial chip and we are uploading code over USB-OTG.
We have noticed that the JTAG interface interferes and causes noise with GPIO pins 39-42. Our ...
For reference I am working with an ESP32S3 module on a custom PCB. As the PCB was required to be small we decided to completely remove the USB-to-Serial chip and we are uploading code over USB-OTG.
We have noticed that the JTAG interface interferes and causes noise with GPIO pins 39-42. Our ...
- Sat Apr 19, 2025 2:34 pm
- Forum: ESP32 Arduino
- Topic: ESP32-S3 GPIO 39~42 (JTAG) during early boot stages
- Replies: 4
- Views: 2781
Re: ESP32-S3 GPIO 39~42 (JTAG) during early boot stages
Hi Chipset68 ,
Apologies I know this is quite an outdated question but we are having the exact same issue for a university project. We've fully designed and manufactured a PCB and we've discovered this same noise on pins 39 and 40. For most other projects I would never be too concerned with a bit ...
Apologies I know this is quite an outdated question but we are having the exact same issue for a university project. We've fully designed and manufactured a PCB and we've discovered this same noise on pins 39 and 40. For most other projects I would never be too concerned with a bit ...