Thank you for your answer, I already opened this issue TW#16751.
This would be a good feature for ESP-IDF in release 3. We are already scanning 2x ADC1 channels at a speed of 204800 samples per second for each, but without the inclusion of Wifi
I am ready to help than I can to solve it faster.

As stated in the "ESP32 Technical Reference Manual", in the "27.3.5 DIG SAR ADC Controllers" can perform high-speed scanning by pattern table. Unfortunately this example: i2s_adc_dac does not work in master branch, gets audio to ADC1 but I2S writing empty data in DMA.
I success to start the ADC1 ...

Example "i2s_adc_dac" is working and correctly write recorded data in to DMA memory, if you return back to the "feature(I2S-ADC): add ADC mode for I2S" but after the "Merge branch 'feature/i2s_built_in_adc' into 'master'" it ceased.