Thank you! It is very flexible and nice solution.

Hi! Thank you for looking into this. Disable all not-nmi intrrupts in the workaround looks resonable. I hope the fix will not disable high interrupts in portENTER_CRITICAL, cause this will make high ints much less usefull. I wounder if dport access is used at all in the post initialization stage. It...

Actually interrupt handler for interrupt with level > 4 will break both workarounds. APB register preread workaround do not work, cause it only disable level 3 or lower ints. Stalling other cpu workaround also do not actually stall cpu if 4 lev int arrive. So far I got no other responses, so I would...

Hi!
Is it safe to access peripheral registers from high interrupt handler? I ask, cause this interrupts is not disabled via freertos macro, so esp-idf dport access workaround do not work in this case.

Is this will replace good old existing esp32? Looks like new chip is step back in all areas except cost and usb. 3 uart was already too low for general purpose mcu.

I am trying to create simple tool what gather stats about large program. This stats could be used to decide which functions should be placed in the iram.
I wounder do exist some method to catch and record flash cache miss event?

Hi. Any update on this? Is the gprof finally supported?