Hi NiclasH, Could you explain how each signals are controlled? for example CS: by SPI_MASTER or PWM CLK: by SPI_MASTER or PWM and do you use SPI_MASTER or SPI_SLAVE? As far as I know, our SPI_MASTER doesn't provide any feature to "sync" the CS with an signal. It's always triggered by the SW. For SPI...

Hi ppisljar,

We forgot to add static when defining quick helper function in the header.

Could you please add `static ` at the begining of operator function lines in `esp_attr.h` and have a try? i.e.

https://github.com/espressif/esp-idf/bl ... .h#L84-L94

Hi DiEitch, Can you check whether your SDIO can work in 1-bit? (note, all the pullups should be left as-is, i.e. D1-D3 should be kept high if not used) Seen from the picture, the slave may ignore one of the clocks. This is possible to be caused by the SSN when all the data lines changed from 1-0 or ...

Each component is treated as an individual part when maintaining the component. Back compatible are only ensured at the component level. I'm afraid that overriding a single file may make you more risky when you update the IDF. Sorry, we don't really have a way to override just one file... overrides ...

Hi, Ritesh You can locally change one IDF file by: 1. modify the files you want 2. goes into the IDF submodule directory. 3. commit all the changes 4. go back to your own repository 5. commit the submodule update (git add [submodule path]; git commit -m "submodule update: ..."), its actually an one-...

Hi, The cs_ena_pretrans and address phase are not compatible in full duplex mode, please see: https://espressif-docs.readthedocs-hosted.com/projects/esp-idf/en/latest/api-reference/peripherals/spi_master.html#_CPPv4N29spi_device_interface_config_t15cs_ena_pretransE The driver automatically set the a...

Hi tsc1987, Here is a debugging patch to show: 1. the process of the trans into and out of sending queue, into and out of the returning queue (to avoid he accidently receive the trans elsewhere). 2. when the interrupt triggers, when the interrupt is enabled/disabled, and trans_done is cleared 3. key...

Hi jollytopper,
What's your clock speed?
Can you provide a piece of simple code for us to test it? From our internal test, one-byte transaction should only take 8us (at 10MHz).

Hi m3ayko83,

We can't tell exactly what's the problem from the information you given. Personally I guess it's a driver initialization issue.
Can you provide your code and the complete log for us to help you?

tatulea wrote: ↑

Fri Feb 08, 2019 10:50 am

It looks like the problem was from DMA. I set it to 0 and I had to put it to 1 in order to use DMA in transaction.

Hi tatulea,
Thanks for your sharing of the debug result.
We will add a check in the code to help you detect this in the future.