https://www.esp32.com/viewtopic.php?t=1130 The fact that there are only four edge-triggered CPU interrupts is independent from edge-triggered gpio peripheral interrupts. It doesnt mean you can only have 4 pins set to trigger on an edge. Probably you want the CPU interrupt associated with the combine...

No you have to switch to sw cs instead of hw

https://esp32.com/viewtopic.php?f=18&t=1546

Yes there is one on taobao/aliexpress.

90°C? Sounds high. Are you using wroom32 or other design? Maybe has poor thermal layout.

Okay, can i finally give the reason why we don't burn the efuse for 1.8V in D2WD. The reason is, if the VDD_SDIO is configured by efuse, it takes some time for the hardware to read efuse values at startup. If the strapping pin configures VDD_SDIO to be 3.3V, then during this time, VDD_SDIO will be ...

I think there are also base64 functions in mbedtls, wpa_supplicant, and ROM.

Nah, I don't believe it. There's probably some chip designers named harry and victor.

It depends on what you are using the pin for. Some case a pulldown resistor is fine, other case may need a switch.

IMO the reason d2wd uses 16&17 for flash is because it was easier to wire bond between the two dies. So should be able to use 9&10 for psram with d2wd. But could be wrong.

No, gpio 16&17 are in vdd_sdio domain that is why they were chosen for psram.

But yes it seems important to know about bootstrap requirements for wrover and d2wd.