BRIEF: How to disable GPIO re-initialization at boot time? DETAIL: * We abuse the HSPI bus to output a proprietary protocol on IO pins. * The protocol requires a normally high state. * The ESP32 occasionally needs to reboot. * We want the IO pin to remain in a high state throughout the reboot and re...

Does anyone have experience with disabling IPv6 in ESP-IDF? From my perspective, IPv6 is wholly unnecessary in a smart-home environment, and disabling it could save valuable RAM and code space. (Furthermore, we are experiencing issues with DNS, and it may be related to the IPv6 DNS implementation, a...

Is it possible to reboot the ESP32 CPU while maintaining the PWM output? Or, what is the minimum glitch we could expect in this scenario? Suppose I have 50% duty cycle, 1kHz PWM output running. Then we reboot. If in 2nd stage bootloader we avoid touching the PWM peripheral, and then reconfigure the ...

Can xiehang or someone else please link a GitHub issue for this, so that we know what's going on?

If confirmed, I'd like to be able to cherry-pick the fix (into v3.3 if possible). We've gotten at least one user report of exactly this symptom.

Is there a known hardware issue with WROVER modules having intermittent "External RAM failed memory test"? We've seen a few dozen units with this problem that prevents boot after a few days of operation, so unfortunately we did not catch in post-production test: E (1547) spiram: SPI SRAM memory test...

Is it possible to add user data to the coredump written to flash, or otherwise add a C hook at time of crash? Why: When coredumps are uploaded from the field, we need to know the exact version number & buildtime so we can look up the corresponding ELF. The version of the firmware performing the core...

@esp_sprite quick question: When receiving from RMT using rmt_get_ringbuf_handle, how can we receive more than 64 rmt items? I try allocating a *lot* of memory for the ring buffer (enough for 1000 items): rmt_driver_install(rle->rmt_config.channel, 8000, 0); But if I transmit more than 64 items, I a...

As far as we know the ESP8266 has built-in HW register for the co-existence GPIO. But for the ESP32 variants there is no information regarding this radio system co-existence feature. This is mandatory when dealing with FCC and the other radio regulations. Did you ever get an answer here, Rivers? I'...

temporarily enable interrupts again on core 1 At which time you introduce potential delays into the code executing on core 1. The code sniplet you posted in your original message seems to suggest that you disable and enable interrupts with each iteration of your busywait loop on core 1. Our require...

only for brief moments Thanks for the quick reply! The minimum duration of those brief moments is dictated by the design of ESP-IDF. I'm not sure what Espressif's design latency is, but empirical testing on our end makes it seem greater than our requirement of <12uS, because we are missing deadline...