Search found 384 matches
- Thu Jun 15, 2017 6:58 pm
- Forum: General Discussion
- Topic: JTAG Hardware
- Replies: 7
- Views: 14163
JTAG Hardware
Hi, I'm about to buy a JTAG debugger. The ESP32 docs says that Espressif have used the Flyswatter2 and TIAO-devices, but would any JTAG device supported by OpenOCD-esp32 work, i.e. any device listed on the page https://github.com/espressif/openocd-esp32 ? Can anyone recommend a good debugger, beside...
- Sun May 28, 2017 10:50 am
- Forum: General Discussion
- Topic: Interrupts on GPIO
- Replies: 3
- Views: 6003
Re: Interrupts on GPIO
Thanks
- Fri May 26, 2017 4:37 pm
- Forum: General Discussion
- Topic: Interrupts on GPIO
- Replies: 3
- Views: 6003
Re: Interrupts on GPIO
Anyone? I'd really appreciate some feedback on these two questions.
- Fri May 26, 2017 4:35 pm
- Forum: General Discussion
- Topic: Programming Jib for ESP32 WROOM Module
- Replies: 3
- Views: 5315
Re: Programming Jib for ESP32 WROOM Module
Perhaps its just me, but solely relying on OTA is like asking for trouble imho. I'd definitely add a place for a pin header in the design, just to be sure that it is possible to restore a bricked item. You don't even have to fit it in production, but it is there when/if you need it. Just my 2 cents.
- Thu May 25, 2017 10:01 am
- Forum: General Discussion
- Topic: Interrupts on GPIO
- Replies: 3
- Views: 6003
Interrupts on GPIO
Hi, Based on the array GPIO_PIN_MUX_REG in this source file , it seems any GPIO, including the input-only pins, can be used as an interrupt source, which is great. It also seems that any interrupt can be set either level or edge triggered using gpio_set_intr_type . However, section 2.3.2 of the Tech...
- Wed May 24, 2017 7:50 pm
- Forum: General Discussion
- Topic: HSPI and VSPI, meaning thereof?
- Replies: 17
- Views: 93541
Re: HSPI and VSPI, meaning thereof?
Ok thanks, now I can stop trying to make sense of the names, and just accept them as-is.
- Tue May 23, 2017 7:51 pm
- Forum: General Discussion
- Topic: HSPI and VSPI, meaning thereof?
- Replies: 17
- Views: 93541
Re: HSPI and VSPI, meaning thereof?
That only states that they're # 2 and #3, not the meaning of H and V, which is what my question is about.krzychb wrote:viewtopic.php?t=804#p3383
- Tue May 23, 2017 7:30 pm
- Forum: General Discussion
- Topic: HSPI and VSPI, meaning thereof?
- Replies: 17
- Views: 93541
HSPI and VSPI, meaning thereof?
Hi,
HSPI and VSPI are referenced throughout the documents and this forum, but I've seen no explanation as to what the H and V actually stands for - could someone please enlighten me?
HSPI and VSPI are referenced throughout the documents and this forum, but I've seen no explanation as to what the H and V actually stands for - could someone please enlighten me?
- Tue May 23, 2017 6:41 pm
- Forum: General Discussion
- Topic: Clarification re. GPIO matrix and IO Mux
- Replies: 5
- Views: 9498
Re: Clarification re. GPIO matrix and IO Mux
Ok, at least I'm thinking about it correctly.
- Tue May 23, 2017 5:55 pm
- Forum: General Discussion
- Topic: Clarification re. GPIO matrix and IO Mux
- Replies: 5
- Views: 9498
Re: Clarification re. GPIO matrix and IO Mux
Ok, so that means that I can't have both JTAG and Ethernet running at the same time since they both use the MTMS-pin (17), right? By pulling MTDO/GPIO15 low, you can disable the debug logging on U0TXD, but if doing that by grounding it, you also prevent MTDO to be used by anything else unless you ha...