Search found 9031 matches

by ESP_Sprite
Sun Apr 21, 2024 5:58 am
Forum: ESP-IDF
Topic: How properly, under RTOS, to set up the highest priority non-maskable interrupt vector?
Replies: 13
Views: 625

Re: How properly, under RTOS, to set up the highest priority non-maskable interrupt vector?

ESP32-wroom-32E If you tried that project, in sdkconfig you can see that I turned all watchdog timers off. I thought that RTOS utilize those timers for them. But even with turned them all off, simply that allocation routine pass through all 32 (priority levels) and can not find any available for al...
by ESP_Sprite
Sun Apr 21, 2024 5:23 am
Forum: ESP-IDF
Topic: Inter Task Commnication Between Two Cores
Replies: 9
Views: 801

Re: Inter Task Commnication Between Two Cores

djixon wrote:
Sun Apr 21, 2024 2:27 am
Try this example from Xtensa ISA architectrure documentation. It is more related in explanation in difference in between L32I and L32AI instructions and S32I and S32AI instructions.
I'm 99% sure the ESP32 Xtensa cores don't support release/acquire instructions.
by ESP_Sprite
Sun Apr 21, 2024 1:00 am
Forum: ESP-IDF
Topic: How properly, under RTOS, to set up the highest priority non-maskable interrupt vector?
Replies: 13
Views: 625

Re: How properly, under RTOS, to set up the highest priority non-maskable interrupt vector?

The issue with interrupts in Xtensa CPUs at least is that you don't have a list of vectors, one per interrupt; instead you have a vector per interrupt *level* and there are only a fairly limited amount of them (5 or so iirc). For the C interrupts, we have a bit of code that multiplexes them but for ...
by ESP_Sprite
Sat Apr 20, 2024 3:22 pm
Forum: Hardware
Topic: "Sleep" mode in which IRAM and cache are preserved
Replies: 6
Views: 346

Re: "Sleep" mode in which IRAM and cache are preserved

Not sure what you're talking about, as the peripherals themselves don't have sleep options; that stuff is controlled centrally. For instance, the ESP32-C3 has a 'Low power management' chapter that discusses most if not all of them. I agree that there's no 'howto' in the TRM for this, but if needed y...
by ESP_Sprite
Sat Apr 20, 2024 3:14 pm
Forum: General Discussion
Topic: Espressif Reveals ESP32-P4, So close to perfection
Replies: 6
Views: 5798

Re: Espressif Reveals ESP32-P4, So close to perfection

If there is a "wifi driver program" for the C2 to act like a P4 Wifi-card, and the only worry is programming the P4, it takes many worries away. The plan is to have esp-hosted to make the C2/C3/C6 act as a 'standard WiFi chip'. We should also be able to program that chip via the P4; the C-series ch...
by ESP_Sprite
Sat Apr 20, 2024 12:59 am
Forum: ESP32 Arduino
Topic: PWM-Signal for H-bridge bldc motor
Replies: 1
Views: 113

Re: PWM-Signal for H-bridge bldc motor

99% sure a measurement error. Make sure you have a good ground connection, and make your measurement loop as small as possible (=no long wire between ground and the probe, or the signal and the probe)
by ESP_Sprite
Sat Apr 20, 2024 12:56 am
Forum: ESP-IDF
Topic: ESP32 S2 Solo2 "just stops"
Replies: 1
Views: 100

Re: ESP32 S2 Solo2 "just stops"

If anything, you shouldn't call any potentially 'long' / blocking things during the ESPNow callback. Normally, you'd quickly filter the package (as in discard it if it's uninteresting) and dump its relevant info in a freertos queue or something if you want to keep it, for another thread to process.
by ESP_Sprite
Sat Apr 20, 2024 12:51 am
Forum: ESP-IDF
Topic: How properly, under RTOS, to set up the highest priority non-maskable interrupt vector?
Replies: 13
Views: 625

Re: How properly, under RTOS, to set up the highest priority non-maskable interrupt vector?

You can. I attached an example on how to do that here. Note that this code is ancient, it e.g. still uses the old make build system, so you may need to tweak it a bit, but the details should be there. In general, this is not implemented in esp-idf because 1. that clock stops in any sleep mode (and m...
by ESP_Sprite
Sat Apr 20, 2024 12:40 am
Forum: ESP-IDF
Topic: Struggling with BLE OTA encrypted updates
Replies: 4
Views: 283

Re: Struggling with BLE OTA encrypted updates

0xcf is the first byte of the *encrypted* image format, but it looks like it's written via function calls that expect the *decrypted* image.
by ESP_Sprite
Sat Apr 20, 2024 12:33 am
Forum: Hardware
Topic: "Sleep" mode in which IRAM and cache are preserved
Replies: 6
Views: 346

Re: "Sleep" mode in which IRAM and cache are preserved

I think that code would crash: you're calling a blocking function in a critical section. In general: That sleep mode is not intended to manually call, to be honest; it's ideal for a RTOS idle scenario as the way it sleeps makes it trivial to implement, with the downside being that the savings are no...