I have just received an ESP32 DevC module (the 2nd) from Olimex today. I have desoldered ESP-WROOM-32 from it and then soldered it on HydraESP32 (see https://hydrabus.com/2016/08/10/hydrabus-v1-0-shield-breakout-board-for-esp-wroom-32-esp32/ for more details) Board available at OSHPark https://oshpa...

Sorry, isn't going to happen. Aside from the fact that this revision only involves one changed metal layer which I'm not even sure contains any ROM data, we need the software to be compatible with rev1, which means that the workarounds for the current chip have to be in esp-idf anyway. Ah I was won...

Not yet, sorry; we've requested it at Cadence, but they still have to get back to us. Be assured we post what we can as soon as we have their permission. You seem to need this manual ASAP. Can I ask what you want to make with it? Maybe there's a different way of solving your problem. My requirement...

I have done some analysis on this download mode and I think I have found the best alternative (as anyway the hardware have a problem with glitch which avoid to enter directly in download boot mode) to fix it on both Windows & Linux (and probably also MacOS ...) My solution is to replace esptool.py f...

Not quite what you asked for, but you can find the overall Xtensa Instruction Set Architecture (ISA) Reference Manual document e.g. here . It's not specific to the 108s that you'll find in the ESP32, but between the ISA doc and the components/esp32/include/xtensa/config/core-isa.h header you can pr...

I have done some Sigrok (PulseView) capture of the signals (tested with Windows7) esp32_after_boot_win7_esptool_py_flash_id_KO: This screenshot corresponds to automatic boot by esptool.py (with parameter flash_id) which fail Root cause SPI Boot mode (IO0 high) instead of UART0 Download mode(IO0 low)...

Just an update I have found a workaround to the random connection problem if I keep "Boot" button pressed esptool.py always works (even on Win7) That is the workaround for v1 boards with hardware bug, are you sure you have v2? Yes I have a v2 as it is wrote on the board on the back ESP32_Core_board...

About your question: If you put the board in download mode first using buttons does it ever fail? It seems it always works when just plugged / powered on (so yes it seems to be software bug maybe in python script of in the code injected/executed by ESP32 ...). I just want to know if the issue I desc...

Hi, I have received an ESP32_Core_board_V2 from AdaFruit 1 week ago (also called ESP32DevC or Espressif ESP32 Development Board - Developer Edition PID: 3269 in AdaFruit shop see link https://www.adafruit.com/products/3269) I'm using an ASUS N56VZ Laptop with 16GB RAM + Samsung 512GB SSD + Corei7-36...

You question is very interesting as I have same type of use case in mind. I think for this use case it is mandatory to use SPI DMA with FIFO (as there is FIFO in SPI with DMA see esp-idf/components/esp32/include/soc/spi_reg.h => SPI_OUT_EOF_MODE) In order to do some treatment in asynchronous manner ...