WROVER and PSRAM and EMAC_TX_CLK

bwendin
Posts: 4
Joined: Mon Sep 02, 2019 8:43 pm

WROVER and PSRAM and EMAC_TX_CLK

Postby bwendin » Mon Sep 02, 2019 11:08 pm

We are using WROVER-B and are using the extra PSRAM inside the WROVER-B package. And we need EMAC_TX_CLK output for our LAN8710A. We have a clock inverter between GPIO0 and LAN8710A CLKIN pin.

We are using esp-idf (version v3.3-rc). When I try to initialize ethernet with clock mode ETH_CLOCK_GPIO0_OUT, I get this error and it won't let me do it, exiting esp_eth_init() with an error ESP_FAIL.

GPIO16 and GPIO17 has been occupied by PSRAM, Only ETH_CLOCK_GPIO_IN is supported!

Does the WROVER-B hardware support PSRAM and ethernet clock out on GPIO0 simultaneously? I think it does, but esp-idf doesn't like it.

I changed esp-idf to allow it and the hardware and software seem to work correctly.

bwendin
Posts: 4
Joined: Mon Sep 02, 2019 8:43 pm

Re: WROVER and PSRAM and EMAC_TX_CLK

Postby bwendin » Fri Sep 13, 2019 5:44 am

As a follow on, it seems if I turn on Wifi or BLE, then ethernet becomes unstable. So GPIO0 with clock out does not work in hardware?

WiFive
Posts: 2687
Joined: Tue Dec 01, 2015 7:35 am

Re: WROVER and PSRAM and EMAC_TX_CLK

Postby WiFive » Sat Sep 14, 2019 9:08 am


bwendin
Posts: 4
Joined: Mon Sep 02, 2019 8:43 pm

Re: WROVER and PSRAM and EMAC_TX_CLK

Postby bwendin » Mon Sep 16, 2019 5:43 pm

Yes, I read that in latest v4.x release (it wasn't in rev 3.x which we used). But there is also this in WROVER-B kit which implies GPIO0 is fully supported in WROVER:

ESP32-Ethernet-Kit V1.0 Getting Started Guide
https://docs.espressif.com/projects/esp ... t-kit.html
"GPIO0 is a source of 50 MHz reference clock for the PHY. The clock signal is first inverted, to account for transmission line delay, and then supplied to the PHY."

We copied that design with GPIO0 as ref clock output with an inverter.

ESP_morris
Posts: 41
Joined: Wed Sep 05, 2018 6:23 am

Re: WROVER and PSRAM and EMAC_TX_CLK

Postby ESP_morris » Tue Sep 17, 2019 2:58 am

Hi @bwendin

Ethernet requires a high quality of RMII clock, the idea of "Output RMII clock via GPIO0" can sometimes be unstable, which depends on your hardware design. So I would like to suggest you switch to using an external xtal as the RMII clock and select the "GPIO0 input mode".

BTW, the "GPIO0 output mode" is not relevant to the PSRAM, it's a bug in idf I think, we will fix it soon. Thanks for your contribution!

bwendin
Posts: 4
Joined: Mon Sep 02, 2019 8:43 pm

Re: WROVER and PSRAM and EMAC_TX_CLK

Postby bwendin » Wed Sep 18, 2019 8:49 pm

When you say "depends on your hardware design" do you refer to
1) GPIO0 as ethernet output will never work when using Wifi or Ble?
2) GPIO0 as ethernet output will never work with most ethernet RMII parts (like LAN8x70 series, etc). We are inverting the signal as shown in WROVER-B ESP32-Ethernet-Kit V1.0 reference design?

I think only #1 is true. Let me know if #2 is true also and WROVER reference design for ethernet won't work.

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