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Re: i2s parallel only works with one dma descriptor

Posted: Tue Dec 03, 2019 1:32 am
by ESP_Angus
Baldhead wrote:
Mon Dec 02, 2019 4:41 am
I send the code via technical inquire. I can send via technical inquire again with the bugs that i encontered after send first time corrected.

Or i can send via private message maybe.
Hi Baldhead,

What Houwenxiang is asking for is a full project that can be compiled, flashed, run, and will show the problems. It's not possible to debug individual pieces of code by themselves, and the context is not always clear when you can't see everything.

A zip file could be attached to this thread. Or if you don't wish to post the project publically then sending a link to Houwenxiang via Private Message should be OK.

Angus

Re: i2s parallel only works with one dma descriptor

Posted: Tue Dec 03, 2019 4:02 am
by Baldhead
Hi,

I sent a private message but apparently i can not attach no file extensions.

I will try a link.

Thank's.

Re: i2s parallel only works with one dma descriptor

Posted: Tue Dec 03, 2019 4:25 am
by Baldhead
Hi,

I sent a private massage with a link to my full project.
Only the build folder which is too big i deleted.

Thank's.

Re: i2s parallel only works with one dma descriptor

Posted: Sun Feb 09, 2020 2:37 pm
by jgustavoam
Hi Baldhead,
I think the I2S peripheral of the ESP32, one of the most complex.
I´m studying it for a long time.

I suggest you test one I2S interface with DMA full test. OK ? Then go to test another.

Did you see this code ?
esp32-camera/driver/camera.c
https://github.com/espressif/esp32-came ... r/camera.c

https://github.com/espressif/esp32-came ... a_common.h

How FIFO sends or receives Bytes?

Code: Select all

typedef enum {
    /* camera sends byte sequence: s1, s2, s3, s4, ...
     * fifo receives: 00 s1 00 s2, 00 s2 00 s3, 00 s3 00 s4, ...
     */
    SM_0A0B_0B0C = 0,
    /* camera sends byte sequence: s1, s2, s3, s4, ...
     * fifo receives: 00 s1 00 s2, 00 s3 00 s4, ...
     */
    SM_0A0B_0C0D = 1,
    /* camera sends byte sequence: s1, s2, s3, s4, ...
     * fifo receives: 00 s1 00 00, 00 s2 00 00, 00 s3 00 00, ...
     */
    SM_0A00_0B00 = 3,
} i2s_sampling_mode_t;