ESP32 VDD Power / Enable pin and GPIO

Posts: 2
Joined: Wed Aug 01, 2018 4:05 pm

ESP32 VDD Power / Enable pin and GPIO

Postby Christian_OCT » Wed Aug 01, 2018 4:25 pm


I was unable to find in the ESP32 various documentations what is the ESP32 GPIO behaviour
when all VDD pins are powered but CHIP_PU (Enable/Reset) is held low.

In our future product the ESP32 will be connected to an STM32F7 microcontroller, both on UART and SDIO interfaces.
When the STM32 is started on bootloader mode for fimrware update the internal bootloader initialize some internal ressources so
some pins on the UART or SDIO interface will be pulled-up to 3.3V with typical internal resistors of 40KOhm.
In this state the ESP32 will have all VDD pins powered but the Enable pin will be low (reset state).

Will the ESP32 be able to handle current limited voltages on GPIO pins with all VDD=3.3V and EN pin =0?

Since the injection current will be limited with the serial 40K pull-up resistors, will the ESP32 be able
to secure handle this case even with VDD=0V?


Best regards

Who is online

Users browsing this forum: No registered users and 11 guests