SPI Master Issue - No Clock Signal Generated

[mpulis]

Hi all,

I'm trying to initialize and use the ESP32's SPI Master interface, using a logic analyzer to monitor the MOSI and CLK signals. The MOSI signal seems to make sense but the clock signal doesn't appear anywhere...

I'm attaching a snapshot of a single transaction, together with the initialization and transaction code. Is anything wrong with the initialization code?

Mode0.PNG (11.14 KiB) Viewed 3988 times

Code: Select all

#define SPI_MASTER_CLOCK 	500000 

#define SPI_MASTER_MISO 	12
#define SPI_MASTER_MOSI 	13
#define SPI_MASTER_CLK  		14
#define SPI_MASTER_SL_CS    	15
#define SPI_MASTER_ACC_CS	24

//!SPI Master device handle
spi_device_handle_t _spi_master;

//!Initialize SPI Master interface
void spiMasterInit()
{
	esp_err_t ret;

	ESP_LOGI(TAG, "spiMasterInit: Initializing SPI Master peripheral");

	spi_bus_config_t buscfg =
	{
		.miso_io_num = SPI_MASTER_MISO,
		.mosi_io_num = SPI_MASTER_MOSI,
		.sclk_io_num = SPI_MASTER_CLK,
		.quadwp_io_num=-1,
		.quadhd_io_num=-1,
		.max_transfer_sz = SPI_MAX_DMA_LEN,
	};

	 spi_device_interface_config_t simple_link_dev_cfg =
	 {
		.clock_speed_hz = SPI_MASTER_CLOCK,      //Clock out at 10 MHz
		.mode = 0,                              			//SPI mode 0
		.spics_io_num = SPI_MASTER_SL_CS,         //CS pin
		.queue_size = 1,                         	       //We want to be able to queue 1 transaction at a time
		.command_bits = 0,						 //skip command phase of transmission
		.address_bits = 0,						 //skip address phase of transmission
		.dummy_bits = 0,						 //clock speed is set low, therefore dummy bits need not be set
		.cs_ena_pretrans = 1,
		.cs_ena_posttrans = 1,
		.flags = 0,			 					 //
		.pre_cb = NULL,							 //no pre transaction callback function
		.post_cb = NULL,						 //no post transaction callback function
	 };

	 ret = spi_bus_initialize(HSPI_HOST, &buscfg, 2); 							//initialize the SPI bus
	 ESP_ERROR_CHECK(ret);
	 ret = spi_bus_add_device(HSPI_HOST, &simple_link_dev_cfg, &_spi_master);	//attach device
	 ESP_ERROR_CHECK(ret);
}

//!Transmit over SPI Master interface
int32_t spiMasterTransmit(char* data, uint16_t data_len)
{
	esp_err_t trans_result = ESP_OK;

	spi_transaction_t transaction =
	{
			.tx_buffer = NULL,							//transmit buffer
			.rx_buffer = NULL,							//no read, transmit only
			.tx_data[0] = 0x01,
			.tx_data[1] = 0x02,
			.tx_data[2] = 0x03,
			.tx_data[3] = 0x04,
			.length = 8*4,								//set data length (bits)
			.flags = SPI_TRANS_USE_TXDATA,
			.cmd = 0,									//command phase skipped
			.addr = 0,									//address phase skipped
			.user = (void*)1,							//user defined variable
	};

	ESP_LOGI(TAG, "spiMasterTransmit: Initializing SPI transaction");

	trans_result = spi_device_polling_transmit(_spi_master, &transaction);
	if(ESP_OK == trans_result)
	{
		ESP_LOGI(TAG, "spiMasterTransmit: Transmitted data successfully");
	}
	else
	{
		ESP_LOGE(TAG, "spiMasterTransmit: Could not manage data transmission");
		return FAILED_OPERATION;
	}

	return	data_len;
}

[mpulis]

I've gotten the code to work ... by reducing the clock frequency to 100kHz.

I can't seem to find any reference to such low clock frequency limitations and the SPI master example in the IDF uses a higher clock frequency.

Any ideas on this?

[marian.keller]

Same Issue here. Only that in a series of a few boards, the issue is only present on one. No clock on Pin 14, everything else working fine. Is there a workaround to ensure the pin is correctly wired up in the IO-Matrix?