and then...The ESP32 chip contains two hardware timer groups. Each group has two general-purpose hardware timers. They are all 64-bit generic timers based on 16-bit prescalers and 64-bit up / down counters which are capable of being auto-reloaded.
So divider effectively sets the value of the prescaler? As in the prescaler is not fixed?Divider: Sets how quickly the timer’s counter is “ticking”. The setting divider is used as a divisor of the incoming 80 MHz APB_CLK clock.
https://github.com/espressif/esp-idf/bl ... soc.h#L242
If that's that's the timer frequency, shouldn't 80 MHz above be 5MHz?
What am I missing here?