Small issue in uart_ll_get_rxfifo_len

MattiaBerton
Posts: 27
Joined: Thu Aug 30, 2018 8:16 am

Small issue in uart_ll_get_rxfifo_len

Postby MattiaBerton » Wed Sep 21, 2022 1:58 pm

Hello,
I'm using ESP32 Uart1 with a modification to the register UART_MEM_CONF_REG to increase the RX buffer length to 256 bytes, instead of 128 by default. However, in uart_ll_get_rxfifo_len you have a fixed value of 128, not dependent of RX buffer, as you can see in the code below.

Code: Select all

FORCE_INLINE_ATTR uint32_t uart_ll_get_rxfifo_len(uart_dev_t *hw)
{
    uint32_t fifo_cnt = HAL_FORCE_READ_U32_REG_FIELD(hw->status, rxfifo_cnt);
    typeof(hw->mem_rx_status) rx_status = hw->mem_rx_status;
    uint32_t len = 0;

    // When using DPort to read fifo, fifo_cnt is not credible, we need to calculate the real cnt based on the fifo read and write pointer.
    // When using AHB to read FIFO, we can use fifo_cnt to indicate the data length in fifo.
    if (rx_status.wr_addr > rx_status.rd_addr) {
        len = rx_status.wr_addr - rx_status.rd_addr;
    } else if (rx_status.wr_addr < rx_status.rd_addr) {
        len = (rx_status.wr_addr + 128) - rx_status.rd_addr;
    } else {
        len = fifo_cnt > 0 ? 128: 0;
    }

    return len;
}
Such a problem causes an index out of buffer and continuous reset if not corrected. Do you agree?
Mattia Berton

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