I2S master clock

HanVertegaal
Posts: 1
Joined: Mon Jul 31, 2017 2:10 pm

I2S master clock

Postby HanVertegaal » Sat Nov 18, 2017 2:11 pm

I'm trying to use the ESP32 for 32-bit audio at 48kHz. Using the following initialization I should get a master clock of 256*48kHz=12.288MHz, however I'm seeing a clock frequency that is twice as high, e.g. 512*48kHz=24.576MHz. My DAC doesn't mind, but the ADC will not work with this clock signal. Is this a problem in my code, or in the I2S driver?

Code: Select all

    int sample_rate = 48000;

    i2s_config_t i2s_config;
    i2s_config.mode = (i2s_mode_t)(I2S_MODE_MASTER | I2S_MODE_TX);
    i2s_config.sample_rate = sample_rate;
    i2s_config.bits_per_sample = I2S_BITS_PER_SAMPLE_32BIT;
    i2s_config.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT; // 2-channels
    i2s_config.communication_format = (i2s_comm_format_t)(I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB);
    i2s_config.dma_buf_count = DMA_BUFFERS;         // 4
    i2s_config.dma_buf_len = SAMPLES_PER_BUFFER;    // 480
    i2s_config.use_apll = 1;
    i2s_config.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1;

    i2s_pin_config_t pin_config;
    pin_config.bck_io_num = 16;
    pin_config.ws_io_num = 17;
    pin_config.data_out_num = 26;
    pin_config.data_in_num = -1;

    i2s_driver_install(I2S_NUM, &i2s_config, 4, &i2s_queue);
    i2s_set_pin(I2S_NUM, &pin_config);
    i2s_set_clk(I2S_NUM, sample_rate, I2S_BITS_PER_SAMPLE_32BIT, I2S_CHANNEL_STEREO);

    // enable I2S output clock on GPIO0 for master mode
    PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0_CLK_OUT1);
    WRITE_PERI_REG(PIN_CTRL, READ_PERI_REG(PIN_CTRL) & 0xFFFFFFF0);


The console output shows the following relevant log entry:

Code: Select all

I2S: APLL: Req RATE: 48000, real rate: 47999.023, BITS: 32, CLKM: 1, BCK: 8, MCLK: 12292917.167, SCLK: 3071937.500000, diva: 1, divb: 0


Thanks for any help

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