The upper 16 bits of the destination of the ULP ST instruction

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The upper 16 bits of the destination of the ULP ST instruction

Postby kolban » Mon Nov 20, 2017 5:23 am

Registers in the ULP co-processor are 16 bits in size. When we we use the ST ULP co-processor instruction, its syntax is:

ST Rsrc, Rdst, offset

For example:

ST R1, R0, 0

would store the contents of R1 in the address contained in R0 with an offset of 0. R0 is specified in 32bit word units.

Since R1 is a 16 bit value and the target of R1 is a 32bit address ... what is stored there? The answer is 32 bits of the format:

Code: Select all

|P|P|P|P|P|P|P|P|P|P|P| | | | |X|V|V|V|V|V|V|V|V|V|V|V|V|V|V|V|V|
Where V is the 16 bits of value of R1 and P is the 11 bits of program counter address also expressed in units of 32bit words and shifted left by 5 bits.

This much is what I believe to be true after reading the docs and running some tests. However the mystery to me is bit 16 of the 32bit word. It is labeled "X" in the diagram above. The documentation says nothing about this. The P and V values are defined. When I ran my tests, I had assumed that bits [20:16] would be zero with bits [31:21] being the PC. However, I'm finding (by experiment) that bit 16 is not zero ... but is 1. Obviously, the value of these bits are "undefined" in the docs and hence have no defined reason for being read/accessed ... but I'm curious as to what I am seeing here?
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