i2s mclk

lin_yabao2016
Posts: 3
Joined: Sun Nov 06, 2016 1:28 pm

i2s mclk

Postby lin_yabao2016 » Tue Jan 10, 2017 2:21 pm

I use "Espressif IoT Development Framework. Official development framework for ESP32", i2s bck and ws is ok,but
my adc need mclk,how can i open esp32 mclk? (stm32 cpu i2s include mclk, bck, ws ) thank you.

ESP_Sprite
Posts: 635
Joined: Thu Nov 26, 2015 4:08 am

Re: is2 mclk

Postby ESP_Sprite » Wed Jan 11, 2017 1:57 am

We do not have a separate mclk output from the i2S driver, sorry. If your I2S codec is happy with a non-synchronized mclk (which a fair few are, in my experience) you can generate this using e.g. the LED PWM module.

colman
Posts: 21
Joined: Mon May 30, 2016 7:41 am

Re: is2 mclk

Postby colman » Tue Feb 28, 2017 6:41 am

The LED PWM module cannot be used to generate the MCLK required for I2S. MCLK requires at a rate of 64x to 256x of the sampling rate. The max. frequency that can be generated by this module is 78.125KHz (= 80MHz / 1024), so, don't try to make use of it. I want to take a look at PWM0~3 modules for generating the MCLK, but there is no information about them.

Colman

ESP_Sprite
Posts: 635
Joined: Thu Nov 26, 2015 4:08 am

Re: is2 mclk

Postby ESP_Sprite » Tue Feb 28, 2017 6:51 am

That's not entirely true. The hardware happily supports a divider of e.g. 2, leading to a 40MHz signal. The driver actually also supports this, but not in an obvious way: the led_timer_bit_t structure you use to select the depth only has 10 to 15-bit options. However, if instead you feed a literal '1' into the setup function instead of one of the enum values, it should work just fine to give you an 1-bit counter. The same goes for any other literal number in the 1-20 range. I'm not sure why we did not include the other bit options as well, to be honest.

colman
Posts: 21
Joined: Mon May 30, 2016 7:41 am

Re: is2 mclk

Postby colman » Tue Feb 28, 2017 9:23 am

Yes, you are right.

Regards,
Colman

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