I2S hack for data reading started by external signal

Langelot
Posts: 12
Joined: Tue Jun 01, 2021 9:57 am

I2S hack for data reading started by external signal

Postby Langelot » Wed Jun 16, 2021 2:43 pm

Hello everyone,

I am trying to read an ADC at a high sampling rate (500ksps). The two available SPI ports of the ESP32 are already used for another purpose requiring full bandwidth.
First I tried to do it by bitbanging. It works but only at slow sampling rates (<75ksps) mainly because toogling the I/O of the ESP in very long. When searching how to improve this I found a post of ESP_Angus advising someone not to do bitbanging but to use I2S for a similar issue.
So I tried.

Here is the timing diagram of the ADC:
Sans titre.png
Sans titre.png (44.33 KiB) Viewed 5669 times
My problem is that I need to start the clock and the reading when the signal "Busy" goes down and to stop it when I have read the first 3 bytes.
i2s_start and i2s_stop are too long to be used between samples.
I guess there is a way to hack the driver but I can't figure it out.

Any idea on how to do it?

Thank you!

ns1668
Posts: 50
Joined: Tue Mar 16, 2021 2:00 pm

Re: I2S hack for data reading started by external signal

Postby ns1668 » Thu Jun 17, 2021 9:36 am

Would it be possible to have the busy line connected to a GPIO, then have an interrupt on that line when the logic level changes you can then stop/start the sampling task as required.

As you say, the stop/start latency is too high between samples, but why would you stop/start between samples anyway.

Alternatively, you could sample all the time and only keep the receive buffer if the busy line is high.

Langelot
Posts: 12
Joined: Tue Jun 01, 2021 9:57 am

Re: I2S hack for data reading started by external signal

Postby Langelot » Thu Jun 17, 2021 10:56 am

Thank you for your reply!

According the component datasheet, the clock signal must be interrupted when the ADC is busy in order to avoid clock pertubations when sampling. The clock signal is given by the ESP I2S peripheral not by the ADC. So it would mean interrupting this clock signal...

In addition if I keep the I2S active when the ADC is not sending data, the I2S peripheral is recording "false zeros" on clock edges which are still present.

To answer your question, yes I can have the busy line connected to an interrupt, but I don't know how to stop the clock from there...
I am also starting to wonder if the interrupt will fire quickly enough anyway: at 500ksps it lets 2us between samples. According to a post of ESP_igrr, the interrupt latency is precisely about 2us.

I think I may be asking too much to this nice ESP32...

ns1668
Posts: 50
Joined: Tue Mar 16, 2021 2:00 pm

Re: I2S hack for data reading started by external signal

Postby ns1668 » Fri Jun 18, 2021 8:40 am

Its 2uS latency but how often do you need to disable the ADC with the busy line? Not every 2uS right?
You might get a few samples coming through if the interrupt is not fast enough, but it could be do-able.

The false zeros are nuisance, but you have some code which is disabling the I2S, so you can set a flag at the same time, and read that flag when you are about to process your sample buffer, and then just ignore it.

Langelot
Posts: 12
Joined: Tue Jun 01, 2021 9:57 am

Re: I2S hack for data reading started by external signal

Postby Langelot » Fri Jun 18, 2021 3:29 pm

In fact, at 500ksps the clock line needs to be stopped each 2us, it means that when the interrupt will start we will already be one cycle late. If we could keep the clock line active then yes I agree, its not a problem to loose a few samples, but the issue here is that this clock line must be interrupted at a frequency of 500kHz.

I have had an idea, it could work if I generate the clock signal and the CNV signal (which starts a new conversion) in a synchronized way. Like this, no need to check the busy signal and fire an interrupt as the ADC busy delay is known. The idea then is to use this clock signal and the data line as inputs of the I2S peripheral this way in addition it should fill the buffer only with valid samples.

I am trying to do that with the RMT peripheral, but no success up to now...

I am worried about the signals synchonization and the ability of the RMT peripheral to loop without delay and produce a continuous signal indefinitely.

Do you think it is possible?

Thank you.

ns1668
Posts: 50
Joined: Tue Mar 16, 2021 2:00 pm

Re: I2S hack for data reading started by external signal

Postby ns1668 » Mon Jun 21, 2021 7:54 am

I have not used the RMT peripheral so I am unsure.

Maybe have a look at this:
https://github.com/davidedellagiustina/ ... c-analyzer

If you search around for "esp32 oscilloscope" you will probably find many projects that attempt to sample at very high frequencies.

Langelot
Posts: 12
Joined: Tue Jun 01, 2021 9:57 am

Re: I2S hack for data reading started by external signal

Postby Langelot » Mon Jun 21, 2021 3:40 pm

Ok, thank you for your help. For I have found up to now, RMT seems to be a possibility, but I have difficulties to synchronize the signals. I will start a new thread for these questions.

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