How is 240 Mhz cpu clock achieved?

greengnu
Posts: 4
Joined: Wed May 08, 2019 8:45 pm

How is 240 Mhz cpu clock achieved?

Postby greengnu » Wed Oct 09, 2019 9:01 am

The esp32 technical reference manual section 3.2.2 states that PLL_CLK is an internal clock with 320Mhz frequency and section 3.2.3 states:


<<As Figure 6 shows, CPU_CLK is the master clock for both CPU cores. CPU_CLK clock can be as high as 160 MHz when the CPU is in high performance mode. Alternatively, the CPU can run at lower frequencies to reduce power consumption>>

However, all esp32 modules that I got go up to 240Mhz. How is that cpu clock achieved? Is PLL_CLK running at 480Mhz rather than 320?

WiFive
Posts: 2676
Joined: Tue Dec 01, 2015 7:35 am

Re: How is 240 Mhz cpu clock achieved?

Postby WiFive » Wed Oct 09, 2019 9:24 am

Yes

greengnu
Posts: 4
Joined: Wed May 08, 2019 8:45 pm

Re: How is 240 Mhz cpu clock achieved?

Postby greengnu » Wed Oct 09, 2019 9:27 am

yes?
Last edited by greengnu on Wed Oct 09, 2019 9:40 am, edited 2 times in total.

greengnu
Posts: 4
Joined: Wed May 08, 2019 8:45 pm

Re: How is 240 Mhz cpu clock achieved?

Postby greengnu » Wed Oct 09, 2019 9:28 am

I assume 'yes' means PLL_CLK runs at 480 Mhz?

What about the other clock sources?

Where can I find a version of the technical reference manual that has correct clocking information?

WiFive
Posts: 2676
Joined: Tue Dec 01, 2015 7:35 am

Re: How is 240 Mhz cpu clock achieved?

Postby WiFive » Wed Oct 09, 2019 10:05 am

Correct. Only pll clk and CPU clk are affected. Apb clk is still 80mhz.

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