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Tests with silicon V1

Posted: Wed May 03, 2017 11:34 am
by ikerbelloso
Hi,
I've finally received samples of ESP32 V1 and I've been testing their response to browout.
I've modifyied kconfig to enable brownout and set BROWNOUT level to 2.1 V and delay to the maximum.
With this silicon now I'm able to see the BOR and RTCWDT_BROWN_OUT_RESET but in my tests I'm being able to leave the device locked:
I'm producing 10ms DC gaps into the power supply so it translates to falls into the VDD of the module under the Brownout level that last for about the same amount of time, but it doesn't fall to zero thanks to the decoupling capacitors.
I repeat the process with VDD stable periods of 10 seconds, so the ESP32 is able to boot normally between them.
In many repetitions it works as expected and the BOR, relaunches correctly the device but in some others I'm facing a system block that can't be recovered unless y remove the input power.
This is what I see into the log terminal:

Code: Select all

ets Jun  8 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_RJaiting for download
 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download
 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download
 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download
 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download
 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download
 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download
 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download
 2016 00:22:57

rst:0xf (RTCWDT_BROWN_OUT_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download


I would add that I have a pull up into the IO0 to reinforce the strap to SPI BOOT.

Any help to prevent this blocking?
Thank you

Re: Tests with silicon V1

Posted: Wed May 03, 2017 11:45 am
by rudi ;-)
ikerbelloso wrote:Hi,
I've finally received samples of ESP32 V1 and I've been testing their response to browout.
...
Any help to prevent this blocking?
Thank you


hi
which ESP32 you use?
ESP32-D0WDQ6
ESP32-D2WDQ5
..
and what is your manufacture mark on the chip?
??2017

do you use bare chip on your own PCB or Wrover V4 or Wrover V5 module?

best wishes
rudi ;-)

Re: Tests with silicon V1

Posted: Wed May 03, 2017 1:00 pm
by ikerbelloso
hi
I use ESP32-D0WDQ6 provided by distributor in south Europe, ASTONE.
image1.JPG
V1 silicon
image1.JPG (176.53 KiB) Viewed 1392 times

I've confirmed through efuses that it is V1. Then, I'm using it replacing the V0 version ESP32-D0WDQ6 of a ESP-WROOM-32.
Then the module is running on a proprietary board and checked that all other functionality is working.
These are captures of the input voltage and the IO0 voltage :
image2.JPG
VDD in green IO0 in pink
image2.JPG (651.43 KiB) Viewed 1392 times

image3.JPG
VDD in green IO0 in pink
image3.JPG (657.82 KiB) Viewed 1392 times

Thanks and regards