openocd/jtag no thread access

linuxpaul
Posts: 43
Joined: Thu Jul 20, 2017 6:10 pm

openocd/jtag no thread access

Postby linuxpaul » Sun Jul 23, 2017 6:58 pm

Hello,

after launching openocd I get no access to threads.

openocd -s ./tcl -f ./esp32.cfg

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Open On-Chip Debugger 0.10.0-dev-gb5ec731f (2017-07-23-00:08)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
adapter speed: 200 kHz
force hard breakpoints
Info : clock speed 200 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Lines like:
Info : esp32.cpu0: Debug controller was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32.cpu0: Core was reset (pwrstat=0x5F, after clear 0x0F).
missing.

After Running xtensa-esp32-elf-gdb -ex 'target remote localhost:3333' ./build/blink.elf I got this additional:

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Info : accepting 'gdb' connection on tcp/3333
Info : Set current thread to 0x00000000, old= 0x00000000
Warn : xtensa_read_memory: esp32: target not halted
Error: Could not read FreeRTOS thread count from target
Sdkconfig settings enable openocd/jtag seems enabled.

Any Ideas?

regards,
linuxpaul

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ESP_krzychb
Posts: 394
Joined: Sat Oct 01, 2016 9:05 am
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Re: openocd/jtag no thread access

Postby ESP_krzychb » Sun Jul 23, 2017 7:45 pm

Hi again,

Are you using default (provided with https://github.com/espressif/openocd-esp32 repository) or modified configuration file(s)?
What is your board and JTAG interface?

Have you tried to call OpenOCD as discussed in https://esp32.com/viewtopic.php?f=13&t=2525#p11896 ?

linuxpaul
Posts: 43
Joined: Thu Jul 20, 2017 6:10 pm

Re: openocd/jtag no thread access

Postby linuxpaul » Sun Jul 23, 2017 9:42 pm

Hi krzychb,
Board: https://eckstein-shop.de/ESP32-T-Develo ... ssif-ESP32
solded with ESP32S. Except the picture, the board (pinning) seems similar to ESP32-DevKiC.
I did some configuration and code examples from Kolban's book and got no trouble till yet.

Cable: C232HM-DDHSL-0
https://www.rsonline-privat.de/Products ... HM-DDHSL-0
ID 0x0403 0x6014

In spite of the (for me unusual) situation finding quite different configurations for the same ID, I took this one from
https://github.com/aykit/theyesmachine/ ... c232hm.cfg

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ftdi_vid_pid 0x0403 0x6014

# 0x000f -> TMS, TCK, TDI, TDO
# 0x4000 -> ^LED
# 0x0010 -> GPIOL0 (grey)
# 0x0020 -> GPIOL1 (purpe)
# 0x0040 -> GPIOL2 (white)
# 0x0080 -> GPIOL3 (blue)

ftdi_layout_init 0x0008 0x400b

ftdi_layout_signal LED -ndata 0x4000

# We could use GPIOL0 and GPIOL1 for SRST resp. TRST.
# This is a guess how to do it:
# ftdi_layout_signal nSRST -data 0x0010 -oe 0x0010
# ftdi_layout_signal nTRST -data 0x0020 -oe 0x0020

ftdi_layout_signal GPIOL0 -data 0x0010 -oe 0x0010
ftdi_layout_signal GPIOL1 -data 0x0020 -oe 0x0020
ftdi_layout_signal GPIOL2 -data 0x0040 -oe 0x0040
ftdi_layout_signal GPIOL3 -data 0x0080 -oe 0x0080
I read the documentation from openOCD to this, but i didn't get
how the parameter values beloning to my Hardware

And the adaption of esp32.cfg:
I'm also running into trouble with ESP108 Command, so I disabled the line.

Code: Select all

#
# Example configuration file to hook up an ESP32 module or board to a JTAG 
# adapter. Please modify this file to your local setup.
#
#


# Include the configuration for the JTAG adapter. We use the Tian TUMPA here.
# If you have a different interface, please edit this to include the 
# configuration file of yours.
source [find interface/ftdi/ftdi_usb.cfg]

# The ESP32 only supports JTAG.
transport select jtag

# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
# do not relate to OpenOCD trying to read from a memory range without physical
# memory being present there), you can try lowering this.
adapter_khz 200

# With no variables set, openocd will configure JTAG for the two cores of the ESP32 and
# will do automatic RTOS detection. This can be be adjusted by uncommenting any of the
# following lines:

# Only configure the PRO CPU
#set ESP32_ONLYCPU 1
# Only configure the APP CPU
#set ESP32_ONLYCPU 2
# Disable RTOS support
#set ESP32_RTOS none
# Force RTOS to be FreeRTOS
set ESP32_RTOS FreeRTOS

#Source the ESP32 configuration file
source [find target/esp32.cfg]


# The TDI pin of ESP32 is also a bootstrap pin that selects the voltage the SPI flash
# chip runs at. When a hard reset happens (e.g. because someone switches the board off
# and on) the ESP32 will use the current TDI value as the bootstrap value because the
# JTAG adapter overrides the pull-up or pull-down resistor that is supposed to do the
# bootstrapping. These lines basically set the idle value of the TDO line to a 
# specified value, therefore reducing the chance of a bad bootup due to a bad flash
# voltage greatly.

# Enable this for 1.8V SPI flash
#esp108 flashbootstrap 1.8
# Enable this for 3.3V SPI flash
#esp108 flashbootstrap 3.3

linuxpaul
Posts: 43
Joined: Thu Jul 20, 2017 6:10 pm

Re: openocd/jtag no thread access

Postby linuxpaul » Mon Jul 24, 2017 3:01 pm

OK, there was a connection difficult (bad contact) to the board.
Changing the cables and the missing lines are shown, pressing reset
after starting openOCD, target went to halted and give me access to the threads.

:)
linuxpaul

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ESP_krzychb
Posts: 394
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Re: openocd/jtag no thread access

Postby ESP_krzychb » Mon Jul 24, 2017 3:08 pm

This is great news :D
Thank you for update!

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