JTAG debuggers

permal
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JTAG debuggers

Postby permal » Thu Aug 10, 2017 5:26 pm

Hi,

I've been trying to get my Olimex ARM-USB-OCD (not the -H version) to function with OpenOCD and my Sparkfun ESP32 Thing, but to no real success. While I've managed to get OpenOCD to communicate with the device, all it does is complain about it seeing all zeroes and I'm having lots of issues getting VM-Ware to connect it to the VM with my Ubuntu installation.

What JTAG debug device are you using, and in what environments?

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kolban
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Location: Texas, USA

Re: JTAG debuggers

Postby kolban » Thu Aug 10, 2017 7:15 pm

I took the easy way out and bought the WROVER Dev Kit from Espressif. For $50 you get:
  • A WROVER module containing an ESP32 and 4MBytes of pSRAM
  • An LCD display
  • A microSD connector
  • Exposed GPIOs (top and bottom)
  • A camera connector
  • An RGB LED
  • An on/off switch
  • ... and a DUAL port/one connection USB socket that provides TWO serial ports to your PC. One serial port for flashing/console and the other for simultaneous JTAG.
... and it all just works.
Free book on ESP32 available here: https://leanpub.com/kolban-ESP32

permal
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Re: JTAG debuggers

Postby permal » Thu Aug 10, 2017 7:20 pm

Yeah, well.. I can't base my design on the Wroover kits, can I? And I need to be able to debug on the final version of my H/W.

enitalp
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Re: JTAG debuggers

Postby enitalp » Thu Aug 10, 2017 7:48 pm

printf is your friend ;p

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krzychb
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Re: JTAG debuggers

Postby krzychb » Thu Aug 10, 2017 10:13 pm

permal wrote:Yeah, well.. I can't base my design on the Wroover kits, can I? And I need to be able to debug on the final version of my H/W.
ESP-WROVER-KIT has JTAG header exposed, so it can be connected the the final version of H/W

Regarding separate adapters:
* Olimex ARM-USB-OCD-H, works with "adapter_khz" at 26 MHz - https://esp32.com/viewtopic.php?f=13&t=2525#p12056
* I see Segger J-Link used quite often - https://gojimmypi.blogspot.com/2017/03/ ... esp32.html
* Several people use TUMPA - https://esp32.com/viewtopic.php?f=13&t= ... mpa#p12285

permal
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Re: JTAG debuggers

Postby permal » Fri Aug 11, 2017 1:58 pm

Anyone happen two know if the "unlimited breakpoints in flash" of Jlink also works for Xtensa MCUs, i.e. the ESP32?

permal
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Re: JTAG debuggers

Postby permal » Fri Aug 11, 2017 2:27 pm

I'll answer myself: No, high level functions are only supported with the cores listed here: https://www.segger.com/products/debug-p ... d-devices/

permal
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Re: JTAG debuggers

Postby permal » Fri Aug 11, 2017 6:06 pm

So I managed to make some progress with my Olimex ARM-USB-OCD device, but am currently stuck with the following errors.
Open On-Chip Debugger 0.10.0-dev-gcc5b0f7 (2017-08-10-17:21)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 1 kHz
force hard breakpoints
Info : clock speed 1 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: esp32.cpu0: IR capture error; saw 0x1f not 0x01
Warn : Bypassing JTAG setup events due to errors
Info : esp32: Debug controller was reset (pwrstat=0xFF, after clear 0xFF).
Info : esp32: Core was reset (pwrstat=0xFF, after clear 0xFF).
Error: cpu0: esp32_fetch_all_regs (line 163): DSR (FFFFFFFF) indicates target still busy!
Error: cpu0: esp32_fetch_all_regs (line 163): DSR (FFFFFFFF) indicates DIR instruction generated an exception!
Error: cpu0: esp32_fetch_all_regs (line 163): DSR (FFFFFFFF) indicates DIR instruction generated an overrun!
Error: cpu0: esp32_fetch_all_regs (line 190): DSR (FFFFFFFF) indicates target still busy!
Error: cpu0: esp32_fetch_all_regs (line 190): DSR (FFFFFFFF) indicates DIR instruction generated an exception!
Error: cpu0: esp32_fetch_all_regs (line 190): DSR (FFFFFFFF) indicates DIR instruction generated an overrun!
Error: Exception reading pc!

Info : Target halted. PRO_CPU: PC=0x00000000 APP_CPU: PC=0x00000000 (active)
Error: cpu0: xtensa_write_memory (line 696): DSR (FFFFFFFF) indicates target still busy!
Error: cpu0: xtensa_write_memory (line 696): DSR (FFFFFFFF) indicates DIR instruction generated an exception!
Error: cpu0: xtensa_write_memory (line 696): DSR (FFFFFFFF) indicates DIR instruction generated an overrun!
Warn : esp32: Failed writing 4 bytes at address 0x3FF5F064, data - a1, 3a, d8, 50, a1, 3a, d8, 50
embedded:startup.tcl:21: Error:
in procedure 'init'
in procedure 'ocd_bouncer'
in procedure 'flash'
in procedure 'ocd_bouncer'
in procedure 'esp_core_halt'
in procedure 'esp32' called at file "./tcl/target/esp32.cfg", line 44
in procedure 'ocd_bouncer'
at file "embedded:startup.tcl", line 21
As you can see, I've lowered "adapter_khz" as far as it can go and I'm still having issues. Ideas anyone, besides tripple checking the wiring?

I run OpenOCD with the following command and the config is as below:

Code: Select all

./src/openocd -s ./tcl -f tcl/interface/ftdi/olimex-arm-usb-ocd.cfg -f ./sparkfun-esp32-thing.cfg

Code: Select all

# The ESP32 only supports JTAG.
transport select jtag

# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
# do not relate to OpenOCD trying to read from a memory range without physical
# memory being present there), you can try lowering this.
#
# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
# if CPU frequency is 160MHz or 240MHz.
adapter_khz 200

# If single core debugging is required, uncomment the following line
set ESP32_ONLYCPU 1

# To disable RTOS support, uncomment the following line
# set ESP32_RTOS none

set ESP32_FLASH_VOLTAGE 1.8

# Source the ESP32 configuration file
source [find target/esp32.cfg]

WiFive
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Re: JTAG debuggers

Postby WiFive » Sat Aug 12, 2017 2:22 am

set ESP32_FLASH_VOLTAGE 1.8
I think should be 3.3v for esp32 thing

permal
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Re: JTAG debuggers

Postby permal » Sat Aug 12, 2017 8:18 am

WiFive wrote:
set ESP32_FLASH_VOLTAGE 1.8
I think should be 3.3v for esp32 thing
I've tried both, same result.

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