Meaning of DPORT Registers

p-rimes
Posts: 89
Joined: Thu Jun 08, 2017 6:20 pm

Meaning of DPORT Registers

Postby p-rimes » Fri Sep 15, 2017 6:51 pm

I see that the DPORT section has been added to the TRM. Meanwhile I have also noticed some code changes in esp-idf master using these registers as well.

I cannot seem to find a short explanation about the meaning/purpose of these registers, for example the following questions:
  • What does DPORT stand for?
  • How is this different from the other registers e.g. for each peripheral? Does it configure the same things, but in a better way?
  • Is it safer (or required?) to use DPORT registers when dual-core is being used?
  • In general, what order should peripherals be configured, DPORT first, then other registers next?

ESP_Sprite
Posts: 9051
Joined: Thu Nov 26, 2015 4:08 am

Re: Meaning of DPORT Registers

Postby ESP_Sprite » Mon Sep 18, 2017 2:47 am

Essentially, the DPORT registers as described in the 'DPORT register' chapter of the TRM describe only the registers that control power/clock/routing things. You cannot control the peripherals itself with them, the registers only enable/disable clock and reset for them, and route interrupts. (Aside from that, it also controls the MMUs)

Aside from that, the ESP32 has two ways of accessing the 'normal' peripheral registers: one is via the APB port (addres 0x60xxxxxx) and the other over the processors D-port (address 0x3Fxxxxxx). Yes, the double use of the D-port nomenclature is confusing... The advantage of the D-port accesses is that it is faster than using the APB registers; the disadvantage is that accessing soem registers through it comes with quirks; see the ESP32 ECO for this.

Aside from *that*, you may also see there's a special access macro for Dport registers in ESP-IDF (DPORT_REG_READ, DPORT_REG_WRITE, ...). This is a workaround for errata 3.10 in the ECO document.

Ah, to why it is called Dport: that naming stems from the Xtensa processor. It has two buses for direct memory access: an I-port to get instructions and a D-port to get and write data. Apart from that, you can also have other buses (APB, PIF, ...) to interface with peripherals. The Dport registers as described in the 2nd paragraph of this post are named like that because they are routed over the D-port in contrast to the APB port. My guess is that the register set as described in the 1st paragraph of this post also are called 'D-port' because they're in the same hardware block as the hardware that does the D-port routing to peripherals.

p-rimes
Posts: 89
Joined: Thu Jun 08, 2017 6:20 pm

Re: Meaning of DPORT Registers

Postby p-rimes » Mon Sep 18, 2017 3:23 am

So helpful!

That fully answers all of my questions.

Thanks @ESP_Sprite!

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