ESP_Sprite wrote:
(If you want an example, we gave out some early psram samples and I gave out some screenshots from an early datasheet of the chip... and here we are...)
the screenprint does show 0x03 for write and does show 0x03 for read,
but the table looks difference. perhabs you check this
- _first_try_same_cmd_fails.jpg (127.08 KiB) Viewed 9901 times
if you can check the testing code, ( more we can not test cause we have no info what we must do )
so you can edit to run a simple
-> write
-> read
-> READ_ID
here is my help to you if you are not start this
you can edit by your knowledge to start here
it is a simple SPI Master code
taken from the esp-idf repo
and edit for using it with pSRAM
and i am sure - there are many mistakes
in it - but we do not know more -
/WP
/HOLD
Were connected to presumption
Whether it is correct - no idea
I have no data sheet of the "manufacturer" available - but you Jeroen.
Simple task to write and read fails
- there must be wrong info about CMD
- there must be wrong info about connect
- there must be wrong / bug in rev 0 silicon? ( i think not so cause rigol response some things right way )
- CLK is 10MHz - so SPI read write must be work ( support is do 33 )
...
...
we play now 14 days on this without a result
Code: Select all
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_system.h"
#include "driver/spi_master.h"
#include "soc/gpio_struct.h"
#include "driver/gpio.h"
#define PIN_NUM_MISO 25 /* DO (2) */
#define PIN_NUM_MOSI 23 /* DI (5) */
#define PIN_NUM_CLK 19 /* CLK (6) */
#define PIN_NUM_CS 22 /* CS (1) */
/* /HOLD -> VCC ( pulled up )
* /WP -> GND ( pulled dwn)
*/
/*
* pSRAM
* knowed CMD
*
*/
#define PSRAM_SPI_FREQ 33000000
#define PSRAM_SPI_READ 0x03 // 3
#define PSRAM_SPI_WRITE 0x02 // 2
#define PSRAM_RESET 0x99
#define PSRAM_READ_ID 0x9F
//This function is called (in irq context!) just before a transmission starts.
void pSRAM_spi_pre_transfer_callback(spi_transaction_t *t)
{
// nothing to do
}
void app_main()
{
esp_err_t ret;
spi_device_handle_t spi;
spi_bus_config_t buscfg={
.miso_io_num=PIN_NUM_MISO,
.mosi_io_num=PIN_NUM_MOSI,
.sclk_io_num=PIN_NUM_CLK,
.quadwp_io_num=-1,
.quadhd_io_num=-1
};
spi_device_interface_config_t devcfg={
.clock_speed_hz=10000000, //Clock out at 10 MHz 10000000
.mode=0, //SPI mode 0
.spics_io_num=PIN_NUM_CS, //CS pin
.queue_size=7, //We want to be able to queue 7 transactions at a time
.pre_cb=pSRAM_spi_pre_transfer_callback, //Specify pre-transfer callback not need for pSRAM
};
//Initialize the SPI bus
ret=spi_bus_initialize(HSPI_HOST, &buscfg, 1);
assert(ret==ESP_OK);
//Attach the LCD to the SPI bus
ret=spi_bus_add_device(HSPI_HOST, &devcfg, &spi);
assert(ret==ESP_OK);
/*=====================================================================*/
printf("try to do see Logical\n");
/* int cmd = PSRAM_READ_ID;
// int was = 0x255;
// esp_err_t ret;
spi_transaction_t t;
memset(&t, 0, sizeof(t)); //Zero out the transaction
t.length=8; //Command is 8 bits
t.tx_buffer=&cmd; //The data is the cmd itself
t.user=(void*)0; //D/C needs to be set to 0
ret=spi_device_transmit(spi, &t); //Transmit!
// printf("Return: %2X", ret);
assert(ret==ESP_OK); //Should have had no issues.
// was = spi_device_get_trans_result(spi,&t);
*/
int len = 5;
uint8_t data[5] = {PSRAM_READ_ID, 0x00, 0x00, 0x00, 0x00};
// esp_err_t ret;
spi_transaction_t t;
if (len==0) return; //no need to send anything
for (int doing=0; doing <2; doing++)
{
memset(&t, 0, sizeof(t)); //Zero out the transaction
t.length=len*8; //Len is in bytes, transaction length is in bits.
t.tx_buffer=data; //Data
t.user=(void*)1; //D/C needs to be set to 1
ret=spi_device_transmit(spi, &t); //Transmit!
assert(ret==ESP_OK); //Should have had no issues.
}
// write
len = 5;
// uint8_t wdata[15] = {PSRAM_SPI_WRITE, 0x00,0x00,0x00,'h','e','l','l','o',' ','w','o','r','l','d'};
uint8_t wdata[5] = {PSRAM_SPI_WRITE, 0x00,0x00,0x00,'h'};
spi_transaction_t tw;
if (len==0) return; //no need to send anything
memset(&t, 0, sizeof(tw)); //Zero out the transaction
tw.length=len*8; //Len is in bytes, transaction length is in bits.
tw.tx_buffer=wdata; //Data
tw.user=(void*)1; //D/C needs to be set to 1
ret=spi_device_transmit(spi, &tw); //Transmit!
assert(ret==ESP_OK); //Should have had no issues.
// read
len = 5;
// uint8_t wdata[15] = {PSRAM_SPI_WRITE, 0x00,0x00,0x00,'h','e','l','l','o',' ','w','o','r','l','d'};
uint8_t rdata[5] = {PSRAM_SPI_READ, 0x00,0x00, 0x00, 0x00};
spi_transaction_t tr;
if (len==0) return; //no need to send anything
memset(&t, 0, sizeof(tr)); //Zero out the transaction
tr.length=len*8; //Len is in bytes, transaction length is in bits.
tr.tx_buffer=rdata; //Data
tr.user=(void*)1; //D/C needs to be set to 1
ret=spi_device_transmit(spi, &tr); //Transmit!
assert(ret==ESP_OK); //Should have had no issues.
printf("..ok\n");
}
this is code without payment - not empty promissings.
there is not in the code " a return" i look on rigol what happens.
and there is shit on the given infos -
this is community we like
we talk open on problems - and hope for answeres to bring further info.
i start this theme now -
some guys know better SPI master and edit the code to go on
some guys know better pSRAM and edit clk cykle and so on
some guys know better to handle electronic HW ( pullups, pulldowns, values )
this is community!
and the "payment guys" steal this infos here more and more for they business
sry !
now i will see that here is community go on and not payment business for services
