eMMC module

marchingband
Posts: 30
Joined: Wed Mar 13, 2019 9:20 pm

Re: eMMC module

Postby marchingband » Fri Apr 05, 2019 5:13 pm

here is an image of the circuit and adapters I am using.
proto_board.jpg
proto_board.jpg (902.56 KiB) Viewed 3266 times

marchingband
Posts: 30
Joined: Wed Mar 13, 2019 9:20 pm

Re: eMMC module

Postby marchingband » Fri Apr 05, 2019 5:53 pm

these are the connections I am using, same as suggested in the sd_card example read_me, all with 10k pull-ups.

GPIO14 -> CLK
GPIO15 -> CMD
GPIO2 -> D0
GPIO4 -> D1
GPIO12 -> D2
GPIO13 -> D3

ESP_igrr
Posts: 1656
Joined: Tue Dec 01, 2015 8:37 am

Re: eMMC module

Postby ESP_igrr » Sat Apr 06, 2019 1:09 am

Based on the log, the difference between the SD and eMMC cases is that for eMMC case, DDR mode is used. You can try disabling the DDR mode (see host.flags), and see if you get the correct result this way.

We'll order those eMMC parts and do a test on our side.

Another thing to try would be to fill the buffer with some bit patterns (0x55AA55AA or like) and print out the contents of the output buffer, not just the first byte. That might also give some direction to investigate.

marchingband
Posts: 30
Joined: Wed Mar 13, 2019 9:20 pm

Re: eMMC module

Postby marchingband » Sat Apr 06, 2019 6:20 pm

I will try those ideas out.
Thank you for your help, please let me know your findings!

In the meantime do you have a list of known compatible eMMC module/breakout/adapter boards?

marchingband
Posts: 30
Joined: Wed Mar 13, 2019 9:20 pm

Re: eMMC module

Postby marchingband » Tue Apr 09, 2019 1:06 am

I use 1-line mode to write numbers from 0-255 to the card.
I use 4-line mode to read them back, using this code:

Code: Select all

#define BYTE_TO_BINARY(byte)  \
  (byte & 0x80 ? '1' : '0'), \
  (byte & 0x40 ? '1' : '0'), \
  (byte & 0x20 ? '1' : '0'), \
  (byte & 0x10 ? '1' : '0'), \
  (byte & 0x08 ? '1' : '0'), \
  (byte & 0x04 ? '1' : '0'), \
  (byte & 0x02 ? '1' : '0'), \
  (byte & 0x01 ? '1' : '0') 
  
void app_main(void)
{
  sdmmc_host_init();

  sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  slot_config.width = 4;
  //slot_config.width = 1;

  sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config);

  sdmmc_host_t host = SDMMC_HOST_DEFAULT();
  host.max_freq_khz = SDMMC_FREQ_PROBING;

  sdmmc_card_t card;
  sdmmc_card_init(&host,&card);

  // sdmmc_host_set_bus_ddr_mode(SDMMC_HOST_SLOT_1, false);

  sdmmc_card_print_info(stdout, &card);

  gpio_set_pull_mode(15, GPIO_PULLUP_ONLY);   // CMD, needed in 4- and 1- line modes
  gpio_set_pull_mode(2, GPIO_PULLUP_ONLY);    // D0, needed in 4- and 1-line modes
  gpio_set_pull_mode(4, GPIO_PULLUP_ONLY);    // D1, needed in 4-line mode only
  gpio_set_pull_mode(12, GPIO_PULLUP_ONLY);   // D2, needed in 4-line mode only
  gpio_set_pull_mode(13, GPIO_PULLUP_ONLY);   // D3, needed in 4- and 1-line modes

  static uint8_t data[256] = {0};
  static uint8_t buff[256] = {0};

  for(uint16_t i=0;i<256;i++){
    data[i]=i;
  }

  // ESP_ERROR_CHECK_WITHOUT_ABORT( sdmmc_write_sectors(&card, data, 1000, 1) );
  ESP_ERROR_CHECK_WITHOUT_ABORT( sdmmc_read_sectors(&card, buff, 1000, 1) );
  for(uint16_t i=0;i<256;i++){
    uint8_t return1 = buff[i];
    printf("%d \n%c%c%c%c %c%c%c%c \n%c%c%c%c %c%c%c%c\n\n",return1,BYTE_TO_BINARY(i),BYTE_TO_BINARY(return1));
  }
and get this result, where the top member is the correct bits, bottom member is whats read from the card:

Code: Select all

Name: 8GTF4R
Type: MMC
Speed: 400 kHz
Size: 7456MB
CSD: ver=3, sector_size=512, capacity=15269888 read_bl_len=9
D (477) sdmmc_req: process_data_status: error 0x109 (status=00000080)
E (487) sdmmc_cmd: sdmmc_read_sectors_dma: sdmmc_send_cmd returned 0x109
ESP_ERROR_CHECK_WITHOUT_ABORT failed: esp_err_t 0x109 (ESP_ERR_INVALID_CRC) at 0x40083e5b
0x40083e5b: _esp_error_check_failed_without_abort at /Users/andymarch/esp/esp-idf/components/esp32/panic.c:715

file: "/Users/andymarch/esp/sd_tests/main/main.c" line 313
func: app_main
expression: sdmmc_read_sectors(&card, buff, 1000, 1)
I (507) sd_tests: 0 
0000 0000 
0000 0000


I (517) sd_tests: 1 
0000 0001 
0000 0001


I (517) sd_tests: 2 
0000 0010 
0000 0010


I (527) sd_tests: 3 
0000 0011 
0000 0011


I (527) sd_tests: 4 
0000 0100 
0000 1100


I (537) sd_tests: 5 
0000 0101 
0000 1101


I (537) sd_tests: 6 
0000 0110 
0000 1110


I (547) sd_tests: 7 
0000 0111 
0000 1111


I (547) sd_tests: 8 
0000 1000 
0000 1100


I (557) sd_tests: 9 
0000 1001 
0000 1101


I (557) sd_tests: 10 
0000 1010 
0000 1110


I (567) sd_tests: 11 
0000 1011 
0000 1111


I (567) sd_tests: 12 
0000 1100 
0000 1100


I (577) sd_tests: 13 
0000 1101 
0000 1101


I (587) sd_tests: 14 
0000 1110 
0000 1110


I (587) sd_tests: 15 
0000 1111 
0000 1111


I (597) sd_tests: 16 
0001 0000 
0001 0000


I (597) sd_tests: 17 
0001 0001 
0001 0001


I (607) sd_tests: 18 
0001 0010 
0001 0010


I (607) sd_tests: 19 
0001 0011 
0001 0011


I (617) sd_tests: 20 
0001 0100 
0001 1100


I (617) sd_tests: 21 
0001 0101 
0001 1101


I (627) sd_tests: 22 
0001 0110 
0001 1110


I (627) sd_tests: 23 
0001 0111 
0001 1111


I (637) sd_tests: 24 
0001 1000 
0001 1100


I (637) sd_tests: 25 
0001 1001 
0001 1101


I (647) sd_tests: 26 
0001 1010 
0001 1110


I (647) sd_tests: 27 
0001 1011 
0001 1111


I (657) sd_tests: 28 
0001 1100 
0001 1100


I (657) sd_tests: 29 
0001 1101 
0001 1101


I (667) sd_tests: 30 
0001 1110 
0001 1110


I (677) sd_tests: 31 
0001 1111 
0001 1111


I (677) sd_tests: 32 
0010 0000 
0010 0000


I (687) sd_tests: 33 
0010 0001 
0010 0001


I (687) sd_tests: 34 
0010 0010 
0010 0010


I (697) sd_tests: 35 
0010 0011 
0010 0011


I (697) sd_tests: 36 
0010 0100 
0010 1100


I (707) sd_tests: 37 
0010 0101 
0010 1101


I (707) sd_tests: 38 
0010 0110 
0010 1110


I (717) sd_tests: 39 
0010 0111 
0010 1111


I (717) sd_tests: 40 
0010 1000 
0010 1100


I (727) sd_tests: 41 
0010 1001 
0010 1101


I (727) sd_tests: 42 
0010 1010 
0010 1110


I (737) sd_tests: 43 
0010 1011 
0010 1111


I (737) sd_tests: 44 
0010 1100 
0010 1100


I (747) sd_tests: 45 
0010 1101 
0010 1101


I (747) sd_tests: 46 
0010 1110 
0010 1110


I (757) sd_tests: 47 
0010 1111 
0010 1111


I (767) sd_tests: 48 
0011 0000 
0011 0000


I (767) sd_tests: 49 
0011 0001 
0011 0001


I (777) sd_tests: 50 
0011 0010 
0011 0010


I (777) sd_tests: 51 
0011 0011 
0011 0011


I (787) sd_tests: 52 
0011 0100 
0011 1100


I (787) sd_tests: 53 
0011 0101 
0011 1101


I (797) sd_tests: 54 
0011 0110 
0011 1110


I (797) sd_tests: 55 
0011 0111 
0011 1111


I (807) sd_tests: 56 
0011 1000 
0011 1100


I (807) sd_tests: 57 
0011 1001 
0011 1101


I (817) sd_tests: 58 
0011 1010 
0011 1110


I (817) sd_tests: 59 
0011 1011 
0011 1111


I (827) sd_tests: 60 
0011 1100 
0011 1100


I (827) sd_tests: 61 
0011 1101 
0011 1101


I (837) sd_tests: 62 
0011 1110 
0011 1110


I (837) sd_tests: 63 
0011 1111 
0011 1111


I (847) sd_tests: 64 
0100 0000 
1100 0000


I (857) sd_tests: 65 
0100 0001 
1100 0001


I (857) sd_tests: 66 
0100 0010 
1100 0010


I (867) sd_tests: 67 
0100 0011 
1100 0011


I (867) sd_tests: 68 
0100 0100 
1100 1100


I (877) sd_tests: 69 
0100 0101 
1100 1101


I (877) sd_tests: 70 
0100 0110 
1100 1110


I (887) sd_tests: 71 
0100 0111 
1100 1111


I (887) sd_tests: 72 
0100 1000 
1100 1100


I (897) sd_tests: 73 
0100 1001 
1100 1101


I (897) sd_tests: 74 
0100 1010 
1100 1110


I (907) sd_tests: 75 
0100 1011 
1100 1111


I (907) sd_tests: 76 
0100 1100 
1100 1100


I (917) sd_tests: 77 
0100 1101 
1100 1101


I (917) sd_tests: 78 
0100 1110 
1100 1110


I (927) sd_tests: 79 
0100 1111 
1100 1111


I (927) sd_tests: 80 
0101 0000 
1101 0000


I (937) sd_tests: 81 
0101 0001 
1101 0001


I (947) sd_tests: 82 
0101 0010 
1101 0010


I (947) sd_tests: 83 
0101 0011 
1101 0011


I (957) sd_tests: 84 
0101 0100 
1101 1100


I (957) sd_tests: 85 
0101 0101 
1101 1101


I (967) sd_tests: 86 
0101 0110 
1101 1110


I (967) sd_tests: 87 
0101 0111 
1101 1111


I (977) sd_tests: 88 
0101 1000 
1101 1100


I (977) sd_tests: 89 
0101 1001 
1101 1101


I (987) sd_tests: 90 
0101 1010 
1101 1110


I (987) sd_tests: 91 
0101 1011 
1101 1111


I (997) sd_tests: 92 
0101 1100 
1101 1100


I (997) sd_tests: 93 
0101 1101 
1101 1101


I (1007) sd_tests: 94 
0101 1110 
1101 1110


I (1007) sd_tests: 95 
0101 1111 
1101 1111


I (1017) sd_tests: 96 
0110 0000 
1110 0000


I (1027) sd_tests: 97 
0110 0001 
1110 0001


I (1027) sd_tests: 98 
0110 0010 
1110 0010


I (1037) sd_tests: 99 
0110 0011 
1110 0011


I (1037) sd_tests: 100 
0110 0100 
1110 1100


I (1047) sd_tests: 101 
0110 0101 
1110 1101


I (1047) sd_tests: 102 
0110 0110 
1110 1110


I (1057) sd_tests: 103 
0110 0111 
1110 1111


I (1057) sd_tests: 104 
0110 1000 
1110 1100


I (1067) sd_tests: 105 
0110 1001 
1110 1101


I (1067) sd_tests: 106 
0110 1010 
1110 1110


I (1077) sd_tests: 107 
0110 1011 
1110 1111


I (1087) sd_tests: 108 
0110 1100 
1110 1100


I (1087) sd_tests: 109 
0110 1101 
1110 1101


I (1097) sd_tests: 110 
0110 1110 
1110 1110


I (1097) sd_tests: 111 
0110 1111 
1110 1111


I (1107) sd_tests: 112 
0111 0000 
1111 0000


I (1107) sd_tests: 113 
0111 0001 
1111 0001


I (1117) sd_tests: 114 
0111 0010 
1111 0010


I (1117) sd_tests: 115 
0111 0011 
1111 0011


I (1127) sd_tests: 116 
0111 0100 
1111 1100


I (1127) sd_tests: 117 
0111 0101 
1111 1101


I (1137) sd_tests: 118 
0111 0110 
1111 1110


I (1147) sd_tests: 119 
0111 0111 
1111 1111


I (1147) sd_tests: 120 
0111 1000 
1111 1100


I (1157) sd_tests: 121 
0111 1001 
1111 1101


I (1157) sd_tests: 122 
0111 1010 
1111 1110


I (1167) sd_tests: 123 
0111 1011 
1111 1111


I (1167) sd_tests: 124 
0111 1100 
1111 1100


I (1177) sd_tests: 125 
0111 1101 
1111 1101


I (1177) sd_tests: 126 
0111 1110 
1111 1110


I (1187) sd_tests: 127 
0111 1111 
1111 1111


I (1187) sd_tests: 128 
1000 0000 
1100 0000


I (1197) sd_tests: 129 
1000 0001 
1100 0001


I (1207) sd_tests: 130 
1000 0010 
1100 0010


I (1207) sd_tests: 131 
1000 0011 
1100 0011


I (1217) sd_tests: 132 
1000 0100 
1100 1100


I (1217) sd_tests: 133 
1000 0101 
1100 1101


I (1227) sd_tests: 134 
1000 0110 
1100 1110


I (1227) sd_tests: 135 
1000 0111 
1100 1111


I (1237) sd_tests: 136 
1000 1000 
1100 1100


I (1237) sd_tests: 137 
1000 1001 
1100 1101


I (1247) sd_tests: 138 
1000 1010 
1100 1110


I (1247) sd_tests: 139 
1000 1011 
1100 1111


I (1257) sd_tests: 140 
1000 1100 
1100 1100


I (1267) sd_tests: 141 
1000 1101 
1100 1101


I (1267) sd_tests: 142 
1000 1110 
1100 1110


I (1277) sd_tests: 143 
1000 1111 
1100 1111


I (1277) sd_tests: 144 
1001 0000 
1101 0000


I (1287) sd_tests: 145 
1001 0001 
1101 0001


I (1287) sd_tests: 146 
1001 0010 
1101 0010


I (1297) sd_tests: 147 
1001 0011 
1101 0011


I (1297) sd_tests: 148 
1001 0100 
1101 1100


I (1307) sd_tests: 149 
1001 0101 
1101 1101


I (1307) sd_tests: 150 
1001 0110 
1101 1110


I (1317) sd_tests: 151 
1001 0111 
1101 1111


I (1327) sd_tests: 152 
1001 1000 
1101 1100


I (1327) sd_tests: 153 
1001 1001 
1101 1101


I (1337) sd_tests: 154 
1001 1010 
1101 1110


I (1337) sd_tests: 155 
1001 1011 
1101 1111


I (1347) sd_tests: 156 
1001 1100 
1101 1100


I (1347) sd_tests: 157 
1001 1101 
1101 1101


I (1357) sd_tests: 158 
1001 1110 
1101 1110


I (1357) sd_tests: 159 
1001 1111 
1101 1111


I (1367) sd_tests: 160 
1010 0000 
1110 0000


I (1377) sd_tests: 161 
1010 0001 
1110 0001


I (1377) sd_tests: 162 
1010 0010 
1110 0010


I (1387) sd_tests: 163 
1010 0011 
1110 0011


I (1387) sd_tests: 164 
1010 0100 
1110 1100


I (1397) sd_tests: 165 
1010 0101 
1110 1101


I (1397) sd_tests: 166 
1010 0110 
1110 1110


I (1407) sd_tests: 167 
1010 0111 
1110 1111


I (1407) sd_tests: 168 
1010 1000 
1110 1100


I (1417) sd_tests: 169 
1010 1001 
1110 1101


I (1417) sd_tests: 170 
1010 1010 
1110 1110


I (1427) sd_tests: 171 
1010 1011 
1110 1111


I (1437) sd_tests: 172 
1010 1100 
1110 1100


I (1437) sd_tests: 173 
1010 1101 
1110 1101


I (1447) sd_tests: 174 
1010 1110 
1110 1110


I (1447) sd_tests: 175 
1010 1111 
1110 1111


I (1457) sd_tests: 176 
1011 0000 
1111 0000


I (1457) sd_tests: 177 
1011 0001 
1111 0001


I (1467) sd_tests: 178 
1011 0010 
1111 0010


I (1467) sd_tests: 179 
1011 0011 
1111 0011


I (1477) sd_tests: 180 
1011 0100 
1111 1100


I (1477) sd_tests: 181 
1011 0101 
1111 1101


I (1487) sd_tests: 182 
1011 0110 
1111 1110


I (1497) sd_tests: 183 
1011 0111 
1111 1111


I (1497) sd_tests: 184 
1011 1000 
1111 1100


I (1507) sd_tests: 185 
1011 1001 
1111 1101


I (1507) sd_tests: 186 
1011 1010 
1111 1110


I (1517) sd_tests: 187 
1011 1011 
1111 1111


I (1517) sd_tests: 188 
1011 1100 
1111 1100


I (1527) sd_tests: 189 
1011 1101 
1111 1101


I (1527) sd_tests: 190 
1011 1110 
1111 1110


I (1537) sd_tests: 191 
1011 1111 
1111 1111


I (1537) sd_tests: 192 
1100 0000 
1100 0000


I (1547) sd_tests: 193 
1100 0001 
1100 0001


I (1557) sd_tests: 194 
1100 0010 
1100 0010


I (1557) sd_tests: 195 
1100 0011 
1100 0011


I (1567) sd_tests: 196 
1100 0100 
1100 1100


I (1567) sd_tests: 197 
1100 0101 
1100 1101


I (1577) sd_tests: 198 
1100 0110 
1100 1110


I (1577) sd_tests: 199 
1100 0111 
1100 1111


I (1587) sd_tests: 200 
1100 1000 
1100 1100


I (1587) sd_tests: 201 
1100 1001 
1100 1101


I (1597) sd_tests: 202 
1100 1010 
1100 1110


I (1597) sd_tests: 203 
1100 1011 
1100 1111


I (1607) sd_tests: 204 
1100 1100 
1100 1100


I (1617) sd_tests: 205 
1100 1101 
1100 1101


I (1617) sd_tests: 206 
1100 1110 
1100 1110


I (1627) sd_tests: 207 
1100 1111 
1100 1111


I (1627) sd_tests: 208 
1101 0000 
1101 0000


I (1637) sd_tests: 209 
1101 0001 
1101 0001


I (1637) sd_tests: 210 
1101 0010 
1101 0010


I (1647) sd_tests: 211 
1101 0011 
1101 0011


I (1647) sd_tests: 212 
1101 0100 
1101 1100


I (1657) sd_tests: 213 
1101 0101 
1101 1101


I (1657) sd_tests: 214 
1101 0110 
1101 1110


I (1667) sd_tests: 215 
1101 0111 
1101 1111


I (1677) sd_tests: 216 
1101 1000 
1101 1100


I (1677) sd_tests: 217 
1101 1001 
1101 1101


I (1687) sd_tests: 218 
1101 1010 
1101 1110


I (1687) sd_tests: 219 
1101 1011 
1101 1111


I (1697) sd_tests: 220 
1101 1100 
1101 1100


I (1697) sd_tests: 221 
1101 1101 
1101 1101


I (1707) sd_tests: 222 
1101 1110 
1101 1110


I (1707) sd_tests: 223 
1101 1111 
1101 1111


I (1717) sd_tests: 224 
1110 0000 
1110 0000


I (1727) sd_tests: 225 
1110 0001 
1110 0001


I (1727) sd_tests: 226 
1110 0010 
1110 0010


I (1737) sd_tests: 227 
1110 0011 
1110 0011


I (1737) sd_tests: 228 
1110 0100 
1110 1100


I (1747) sd_tests: 229 
1110 0101 
1110 1101


I (1747) sd_tests: 230 
1110 0110 
1110 1110


I (1757) sd_tests: 231 
1110 0111 
1110 1111


I (1757) sd_tests: 232 
1110 1000 
1110 1100


I (1767) sd_tests: 233 
1110 1001 
1110 1101


I (1767) sd_tests: 234 
1110 1010 
1110 1110


I (1777) sd_tests: 235 
1110 1011 
1110 1111


I (1787) sd_tests: 236 
1110 1100 
1110 1100


I (1787) sd_tests: 237 
1110 1101 
1110 1101


I (1797) sd_tests: 238 
1110 1110 
1110 1110


I (1797) sd_tests: 239 
1110 1111 
1110 1111


I (1807) sd_tests: 240 
1111 0000 
1111 0000


I (1807) sd_tests: 241 
1111 0001 
1111 0001


I (1817) sd_tests: 242 
1111 0010 
1111 0010


I (1817) sd_tests: 243 
1111 0011 
1111 0011


I (1827) sd_tests: 244 
1111 0100 
1111 1100


I (1827) sd_tests: 245 
1111 0101 
1111 1101


I (1837) sd_tests: 246 
1111 0110 
1111 1110


I (1847) sd_tests: 247 
1111 0111 
1111 1111


I (1847) sd_tests: 248 
1111 1000 
1111 1100


I (1857) sd_tests: 249 
1111 1001 
1111 1101


I (1857) sd_tests: 250 
1111 1010 
1111 1110


I (1867) sd_tests: 251 
1111 1011 
1111 1111


I (1867) sd_tests: 252 
1111 1100 
1111 1100


I (1877) sd_tests: 253 
1111 1101 
1111 1101


I (1877) sd_tests: 254 
1111 1110 
1111 1110


I (1887) sd_tests: 255 
1111 1111 
1111 1111
Although it appears there is a pattern I do not know enough about the workings of the driver code to debug.
The errors are consistent over multiples resets.
Where could I start?
Thanks!!!!

marchingband
Posts: 30
Joined: Wed Mar 13, 2019 9:20 pm

Re: eMMC module

Postby marchingband » Tue Apr 09, 2019 1:13 am

the errors are always in the 3rd,4th,7th or 8th bit ... does this again point at signal integrity on 2 of the 4 lines?

marchingband
Posts: 30
Joined: Wed Mar 13, 2019 9:20 pm

Re: eMMC module

Postby marchingband » Tue Apr 09, 2019 1:58 am

it appears that BIT3 and BIT4 are OR'd,
likewise BIT7 and BIT8 are OR'd

marchingband
Posts: 30
Joined: Wed Mar 13, 2019 9:20 pm

Re: eMMC module

Postby marchingband » Wed Apr 10, 2019 5:48 pm

Does cross-talk like this between signal lines point at the same signal integrity issues as before, in your experience? Or does this look like a driver issue?
thanks!

ESP_igrr
Posts: 1656
Joined: Tue Dec 01, 2015 8:37 am

Re: eMMC module

Postby ESP_igrr » Thu Apr 25, 2019 1:14 am

If you disable the DDR mode in sdmmc_host_t::flags, does this change the error pattern?
The interesting thing seems to be that the write command seems to succeed in 4-line mode, but read command fails in 4-line mode. I can't really explain how this may happen, as any signal issues should be symmetrical (unless they also depend on drive strength, but that seems to be unlikely).
Regarding whether the issue is in the hardware or in the driver: the driver itself doesn't deal with data directly. It sets up the hardware and then all the data is sent by DMA. So this is either a hardware issue, or a driver bug in that it misconfigures the hardware. However any timing misconfiguration would likely affect all the pins, not just two of them. So overall it does look like a hardware issue to me. Perhaps a short somewhere between the two signal lines? The error pattern resembles a "wired OR"...

marchingband
Posts: 30
Joined: Wed Mar 13, 2019 9:20 pm

Re: eMMC module

Postby marchingband » Thu Apr 25, 2019 8:29 am

I am happy to report it was indeed a short. The culprit was the sd->eMMC adapter card. The traces are very close together and short where they contact the micro->sd adapter. There is a sweet spot that prevents the short but keeps the connections intact.

I am not sure why I didn't think to check for a short when I saw the or'd bits, and I am very grateful for your assistance. The eMMC works wonderfully now in 4-BIT mode. It reads a single sector in about 260 us, just fast enough for my use case :D

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