[Latest Update] ESP32 Hardware Reference Design

KevinA
Posts: 12
Joined: Tue Sep 20, 2016 3:09 pm

Re: [Latest Update] ESP32 Hardware Reference Design

Postby KevinA » Sat Oct 01, 2016 8:06 pm

KevinA wrote:I can't find where to post documentation errors:
ESP32 Datasheet 3.1.3 External Flash and SRAM
"ESP32 supports 4 X 16 MBytes of external QSPI Flash" this indicates 4 times 16MBytes

"ESP32 supports up to 128 Mbits of external DUAL or QUAD SPI Flash memory"

The SRAM issue:
On the IO_MUX page where is the address and data pins for a SRAM chip? How do I tell the memory controller?
Am I not looking in the right PDF?


:lol: I just downloaded everything earlier this morning and now you've pointed to version 1.1 !
Update: The link points to a page where the labels have rev numbers but the documentation is the same.
Can you throw me a hint which PDF contains the description on GPIO Mapping?
Thanks

WiFive
Posts: 972
Joined: Tue Dec 01, 2015 7:35 am

Re: [Latest Update] ESP32 Hardware Reference Design

Postby WiFive » Sat Oct 01, 2016 8:54 pm

KevinA wrote:
KevinA wrote:I can't find where to post documentation errors:
ESP32 Datasheet 3.1.3 External Flash and SRAM
"ESP32 supports 4 X 16 MBytes of external QSPI Flash" this indicates 4 times 16MBytes

"ESP32 supports up to 128 Mbits of external DUAL or QUAD SPI Flash memory"

The SRAM issue:
On the IO_MUX page where is the address and data pins for a SRAM chip? How do I tell the memory controller?
Am I not looking in the right PDF?


:lol: I just downloaded everything earlier this morning and now you've pointed to version 1.1 !
Update: The link points to a page where the labels have rev numbers but the documentation is the same.
Can you throw me a hint which PDF contains the description on GPIO Mapping?
Thanks


Technical reference manual section 4 and pin list document. SRAM would use SPI0. I don't know if it is fully supported yet in software. https://github.com/espressif/esp-idf/bl ... 2/spiram.h

KevinA
Posts: 12
Joined: Tue Sep 20, 2016 3:09 pm

Re: [Latest Update] ESP32 Hardware Reference Design

Postby KevinA » Sun Oct 02, 2016 12:25 am

SPIRAM:
MR25H40MDF 4M as 512KX8 $21.82 qty 1
Earlier I had read we could add external SRAM as IRAM... I don't think so, maybe after it's moved into IRAM but this SPIRAM stuff is painful to work with. It has 1 byte writes, after you set it up and 40 clock cycles later your done. I could see it as a buffer to save the flash from being over used, maybe chaining DMA to the SPI....
Interesting -> http://www.computerworld.com/article/30 ... vices.html

ESP_Sprite
Posts: 898
Joined: Thu Nov 26, 2015 4:08 am

Re: [Latest Update] ESP32 Hardware Reference Design

Postby ESP_Sprite » Sun Oct 02, 2016 6:05 am

For now, external SRAM is only really usable by either using it as a generic external SPI device or by using a SPI channel with DMA to essentially copy data to or from it. In theory, we also have a way to map 4MB of SRAM into into the D-bus (so you can basically use it in the same way as you can use DRAM that is inside the ESP32) but there's something funny going on with that; it'll probably cost us 2 to 3 months to fix this.

dotthree
Posts: 33
Joined: Wed Oct 12, 2016 7:12 pm

Re: [Latest Update] ESP32 Hardware Reference Design

Postby dotthree » Thu Oct 20, 2016 12:59 am

ESP_Sprite wrote:For now, external SRAM is only really usable by either using it as a generic external SPI device or by using a SPI channel with DMA to essentially copy data to or from it. In theory, we also have a way to map 4MB of SRAM into into the D-bus (so you can basically use it in the same way as you can use DRAM that is inside the ESP32) but there's something funny going on with that; it'll probably cost us 2 to 3 months to fix this.


Keep us upto date! The ESP32 is perfect for my application save for my SRAM requirement.

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