Wow, 5bps! With some practice you could almost whistle that baud rate!
Unfortunately I don't think this is supported via the
UART peripheral, at least not yet.
UART master clock is the APB clock which is 80MHz by default. The integer portion of the clock divider register is 20 bits wide, which gives a theoretical minimum speed of 76bps (I'm not certain a rate this low is actually supported either, would have to check). You would you need a 24 bit divider to divide 80MHz down to 5Hz.
In future I think we will support other APB clock frequencies and/or
UART clock sources, but we don't support this right now.
The good news is, such a low bitrate should be very straightforward to bit-bang read as a "soft
UART". I'd suggest using a GPIO interrupt to detect a start condition, and then enable a "timer group" timer to configure a timer interrupt, and read the pin as a GPIO from the ISR. At 240MHz you will have lots of spare time between each bit period.
Angus