I2C - No ack for Device address?

[floitsch_toit]

The documentation for the I2C Master Write and Read [0] has a diagram that states that the slave doesn't ack the (device address | R) and immediately sends the data that should be read. Is this a bug in the documentation, or is there really no ACK happening?

[0] https://docs.espressif.com/projects/esp ... e-and-read

[ahsrabrifat]

The typical sequence for a combined write and read operation involves:

The master sends a START condition.
The master sends the slave address with the write bit (0).
The slave acknowledges (ACK) the address.
The master sends the register address it wants to write to or read from.
The slave acknowledges (ACK) the register address.
The master sends a repeated START condition.
The master sends the slave address with the read bit (1).
The slave acknowledges (ACK) the address.
The slave sends the requested data.
The master sends a NACK after the last byte to indicate the end of reading.
The master sends a STOP condition to release the bus.
The absence of this ACK in the diagram does not reflect the standard I²C behavior. Maybe it was skipped unintentionally.

[floitsch_toit]

Thanks.
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