Custom Board ESP32-S3-WROOM-1U-N16R8 issues with PSRAM!

[Erebor12]

Hello, I am building a custom board using ESP32-S3-WROOM-1U-N16R8.
Upon initial testing of the PCB, the ESP32 fails to configure PSRAM. Using platformio and the following code and ESP32-S3-Devkit3 (with WROOM N16R8 version https://www.amazon.com/dp/B0CGYXJB6Y?re ... itle&th=1)) the code works without issues.
On the custom board the system uploads and goes into a continuous loop of rebooting and failing to initialize external RAM.
FYI-If I do not use external PSRAM the device appears to work fine.

I believe the issue is hardware related. Attached is the schematic of the GPIO, strapping pins, and switches along with the error messages and platformio setup/JSON file for the custom board.
Is there anything that looks incorrect? I noticed that the Devkit C board has no pull up/down resistors for IO3, or IO45/IO46 but my board does.
I configured the device using menuconfig to setup ESP PSRAM (enable support for ext. SPI-connected RAM, set mode to Octal, set autodetect SPI ram on, set RAM clock speed to 80 MHz, verified CLK = 30 and CS = 26 for SPIRAM.
Other than that I am not sure what exactly could be the issue.
Any assistance is appreciated, greatly!!

Platform.ini file:

Code: Select all

[platformio]
boards_dir = boards

[env:esp32-s3-devkitc-1-n16r8v-idf]
platform = espressif32
board = esp32-s3-devkitc-1-n16r8v-idf
framework = espidf
monitor_speed = 115200
upload_port = COM8
monitor_port = COM8
build_flags = 
    -D CONFIG_ESP32_SPIRAM_SUPPORT=1

Main.c code:

Code: Select all

#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_log.h"
#include "esp_heap_caps.h"
#include "esp_system.h"

static const char *TAG = "TestApp";

void app_main(void)
{
    // Initialize UART for logging
    const int uart_baud_rate = 115200;
    esp_log_level_set(TAG, ESP_LOG_DEBUG);
    setvbuf(stdout, NULL, _IONBF, 0);  // Disable buffering for printf

    printf("Running TestApp ESP32-S3\n");

    while (1) {
        ESP_LOGD(TAG, "Total heap: %d", heap_caps_get_total_size(MALLOC_CAP_DEFAULT));
        ESP_LOGD(TAG, "Free heap: %d", heap_caps_get_free_size(MALLOC_CAP_DEFAULT));
        ESP_LOGD(TAG, "Total PSRAM: %d", heap_caps_get_total_size(MALLOC_CAP_SPIRAM));
        ESP_LOGD(TAG, "Free PSRAM: %d", heap_caps_get_free_size(MALLOC_CAP_SPIRAM));

        vTaskDelay(pdMS_TO_TICKS(1000));  // Delay for 1 second
    }
}

esp32-s3-devkitc-1-n16r8v-idf file:

Code: Select all

{
  "build": {
    "core": "esp32",
    "f_cpu": "240000000L",
    "f_flash": "80000000L",
    "flash_mode": "qio",
    "psram_type": "opi",
    "mcu": "esp32s3",
    "variant": "esp32s3",
    "extra_flags": [
      "-DBOARD_HAS_PSRAM"
    ]
  },
  "connectivity": [
    "wifi",
    "bluetooth"
  ],
  "debug": {
    "default_tool": "esp-builtin",
    "onboard_tools": [
      "esp-builtin"
    ],
    "openocd_target": "esp32s3.cfg"
  },
  "frameworks": [
    "espidf"
  ],
  "name": "Espressif ESP32-S3-DevKitC-1-N16R8V (ESP-IDF Only)",
  "upload": {
    "flash_size": "16MB",
    "maximum_ram_size": 327680,
    "maximum_size": 16777216,
    "require_upload_port": true,
    "speed": 921600
  },
  "url": "https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitc-1.html",
  "vendor": "Espressif"
}

Errors when uploaded:
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40376535
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2810,len:0x15a0
load:0x403c8700,len:0x4
load:0x403c8704,len:0xd20
load:0x403cb700,len:0x2f00
entry 0x403c8920
I (26) boot: ESP-IDF 5.4.1 2nd stage bootloader
I (26) boot: compile time Jul 3 2025 12:59:36
I (26) boot: Multicore bootloader
I (27) boot: chip revision: v0.2
I (29) boot: efuse block revision: v1.3
I (33) boot.esp32s3: Boot SPI Speed : 80MHz
I (37) boot.esp32s3: SPI Mode : DIO
I (40) boot.esp32s3: SPI Flash Size : 16MB
I (44) boot: Enabling RNG early entropy source...
I (49) boot: Partition Table:
I (51) boot: ## Label Usage Type ST Offset Length
I (58) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (64) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (71) boot: 2 factory factory app 00 00 00010000 00100000
I (77) boot: End of partition table
I (80) esp_image: segment 0: paddr=00010020 vaddr=3c020020 size=0a66ch ( 42604) map
I (95) esp_image: segment 1: paddr=0001a694 vaddr=3fc93600 size=02e14h ( 11796) load
I (98) esp_image: segment 2: paddr=0001d4b0 vaddr=40374000 size=02b68h ( 11112) load
I (105) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=18398h ( 99224) map
I (128) esp_image: segment 4: paddr=000383c0 vaddr=40376b68 size=0ca6ch ( 51820) load
I (139) esp_image: segment 5: paddr=00044e34 vaddr=600fe100 size=0001ch ( 28) load
I (146) boot: Loaded app from partition at offset 0x10000
I (146) boot: Disabling RNG early entropy source...
E (157) octal_psram: PSRAM ID read error: 0x00000000, PSRAM chip not found or not supported, or wrong PSRAM line mode
E cpu_start: Failed to init external RAM!

abort() was called at PC 0x40375be5 on core 0

[Erebor12]

Bump. Still no success. Does anyone have any suggestions?