SDMMC example only works on one board

bob.mozart
Posts: 10
Joined: Wed Jun 18, 2025 8:29 pm

SDMMC example only works on one board

Postby bob.mozart » Thu Jul 03, 2025 7:10 pm

Hellooo

I am trying to flash the SDMMC example from the IDF github: https://github.com/espressif/esp-idf/tr ... card/sdmmc. I have three boards:

1) a ESP32S3-WROOM-1
2) a ESP32S3-WROOM-2
3) a ESP32S3-WROOM-1 N16R8

I am in 1-bit mode with CMD(pin 35), CLK(pin 2), D0(pin 37) on all boards.

The example flashes fine for the first board.

The example gives me these logs infinitely repeating for the second board:

Code: Select all

--- Warning: GDB cannot open serial ports accessed as COMx
--- Using \\.\COM9 instead...
--- esp-idf-monitor 1.6.2 on \\.\COM9 115200
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H
I (107) esp_image: segment 1: paddr=0001c318 vaddr=3fc92600 sizeESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x15 (USB_UART_CHIP_RESET),boot:0x9 (SPI_FAST_FLASH_BOOT)
Saved PC:0x4037825c
--- 0x4037825c: _xt_panic at C:/Users/PRIVATE/esp/v5.4.1/esp-idf/components/esp_system/port/arch/xtensa/panic_handler_asm.S:28

SPIWP:0xee
Octal Flash Mode Enabled
For OPI Flash, Use Default Flash Boot Mode
mode:SLOW_RD, clock div:1
load:0x3fce2810,len:0x15a0
load:0x403c8700,len:0x4
load:0x403c8704,len:0xd20
load:0x403cb700,len:0x2f00
entry 0x403c8928
I (33) boot: ESP-IDF v5.4.1 2nd stage bootloader
I (33) boot: compile time Jul  3 2025 13:55:43
I (33) boot: Multicore bootloader
I (34) boot: chip revision: v0.1
I (36) boot: efuse block revision: v1.2
I (40) boot.esp32s3: Boot SPI Speed : 80MHz
I (44) boot.esp32s3: SPI Mode       : SLOW READ
I (48) boot.esp32s3: SPI Flash Size : 2MB
I (52) boot: Enabling RNG early entropy source...
I (56) boot: Partition Table:
I (59) boot: ## Label            Usage          Type ST Offset   Length
I (65) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (71) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (78) boot:  2 factory          factory app      00 00 00010000 00100000
I (85) boot: End of partition table
I (88) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0c2f0h ( 49904) map
I (107) esp_image: segment 1: paddr=0001c318 vaddr=3fc92600 size=02b38h ( 11064) load
I (110) esp_image: segment 2: paddr=0001ee58 vaddr=40374000 size=011c0h (  4544) load
I (112) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=29d9ch (171420) map
I (159) esp_image: segment 4: paddr=00049dc4 vaddr=403751c0 size=0d3b0h ( 54192) load
I (174) esp_image: segment 5: paddr=0005717c vaddr=600fe100 size=0001ch (    28) load
I (180) boot: Loaded app from partition at offset 0x10000
I (180) boot: Disabling RNG early entropy source...
I (192) cpu_start: Multicore app
I (200) cpu_start: Pro cpu start user code
I (201) cpu_start: cpu freq: 160000000 Hz
I (201) app_init: Application information:
I (201) app_init: Project name:     sd_card
I (205) app_init: App version:      1
I (208) app_init: Compile time:     Jul  3 2025 13:55:08
I (213) app_init: ELF file SHA256:  d00f44c9b...
I (217) app_init: ESP-IDF:          v5.4.1
I (221) efuse_init: Min chip rev:     v0.0
I (225) efuse_init: Max chip rev:     v0.99
I (229) efuse_init: Chip rev:         v0.1
I (233) heap_init: Initializing. RAM available for dynamic allocation:
I (239) heap_init: At 3FC95A80 len 00053C90 (335 KiB): RAM
I (244) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (249) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (255) heap_init: At 600FE11C len 00001ECC (7 KiB): RTCRAM
W (260) spi_flash: Octal flash chip is using but dio mode is selected, will automatically switch to Octal mode
I (270) spi_flash: detected chip: mxic (opi)
I (274) spi_flash: flash io: opi_str
W (277) spi_flash: Detected size(32768k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (289) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (296) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (302) main_task: Started on CPU0
I (312) main_task: Calling app_main()
I (312) example: Initializing SD card
I (312) example: Using SDMMC peripheral
I (312) example: Mounting filesystem
I (322) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x8 (TG1WDT_SYS_RST),boot:0x9 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403743c8
--- 0x403743c8: _DoubleExceptionVector at C:/Users/PRIVATE/esp/v5.4.1/esp-idf/components/xtensa/xtensa_vectors.S:568

SPIWP:0xee
Octal Flash Mode Enabled
For OPI Flash, Use Default Flash Boot Mode
mode:SLOW_RD, clock div:1
load:0x3fce2810,len:0x15a0
load:0x403c8700,len:0x4
load:0x403c8704,len:0xd20
load:0x403cb700,len:0x2f00
entry 0x403c8928
I (32) boot: ESP-IDF v5.4.1 2nd stage bootloader
I (32) boot: compile time Jul  3 2025 13:55:43
I (33) boot: Multicore bootloader
I (33) boot: chip revision: v0.1
I (36) boot: efuse block revision: v1.2
I (39) boot.esp32s3: Boot SPI Speed : 80MHz
I (43) boot.esp32s3: SPI Mode       : SLOW READ
I (47) boot.esp32s3: SPI Flash Size : 2MB
W (51) boot.esp32s3: PRO CPU has been reset by WDT.
W (56) boot.esp32s3: APP CPU has been reset by WDT.
I (60) boot: Enabling RNG early entropy source...
I (65) boot: Partition Table:
I (67) boot: ## Label            Usage          Type ST Offset   Length
I (74) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (80) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (87) boot:  2 factory          factory app      00 00 00010000 00100000
I (93) boot: End of partition table
I (96) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0c2f0h ( 49904) map
I (116) esp_image: segment 1: paddr=0001c318 vaddr=3fc92600 size=02b38h ( 11064) load
I (119) esp_image: segment 2: paddr=0001ee58 vaddr=40374000 size=011c0h (  4544) load
I (121) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=29d9ch (171420) map
I (167) esp_image: segment 4: paddr=00049dc4 vaddr=403751c0 size=0d3b0h ( 54192) load
I (183) esp_image: segment 5: paddr=0005717c vaddr=600fe100 size=0001ch (    28) load
I (188) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) cpu_start: Multicore app
I (209) cpu_start: Pro cpu start user code
I (209) cpu_start: cpu freq: 160000000 Hz
I (209) app_init: Application information:
I (210) app_init: Project name:     sd_card
I (213) app_init: App version:      1
I (217) app_init: Compile time:     Jul  3 2025 13:55:08
I (222) app_init: ELF file SHA256:  d00f44c9b...
I (226) app_init: ESP-IDF:          v5.4.1
I (230) efuse_init: Min chip rev:     v0.0
I (234) efuse_init: Max chip rev:     v0.99
I (238) efuse_init: Chip rev:         v0.1
I (241) heap_init: Initializing. RAM available for dynamic allocation:
I (248) heap_init: At 3FC95A80 len 00053C90 (335 KiB): RAM
I (253) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (258) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (263) heap_init: At 600FE11C len 00001ECC (7 KiB): RTCRAM
W (269) spi_flash: Octal flash chip is using but dio mode is selected, will automatically switch to Octal mode
I (278) spi_flash: detected chip: mxic (opi)
I (282) spi_flash: flash io: opi_str
W (286) spi_flash: Detected size(32768k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (298) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (304) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (311) main_task: Started on CPU0
I (321) main_task: Calling app_main()
I (321) example: Initializing SD card
I (321) example: Using SDMMC peripheral
I (321) example: Mounting filesystem
I (331) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x8 (TG1WDT_SYS_RST),boot:0x9 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403743c0
--- 0x403743c0: _DoubleExceptionVector at C:/Users/PRIVATE/esp/v5.4.1/esp-idf/components/xtensa/xtensa_vectors.S:564

SPIWP:0xee
Octal Flash Mode Enabled
For OPI Flash, Use Default Flash Boot Mode
mode:SLOW_RD, clock div:1
load:0x3fce2810,len:0x15a0
load:0x403c8700,len:0x4
load:0x403c8704,len:0xd20
load:0x403cb700,len:0x2f00
entry 0x403c8928
I (32) boot: ESP-IDF v5.4.1 2nd stage bootloader
I (32) boot: compile time Jul  3 2025 13:55:43
I (33) boot: Multicore bootloader
I (33) boot: chip revision: v0.1
I (36) boot: efuse block revision: v1.2
I (39) boot.esp32s3: Boot SPI Speed : 80MHz
I (43) boot.esp32s3: SPI Mode       : SLOW READ
I (47) boot.esp32s3: SPI Flash Size : 2MB
W (51) boot.esp32s3: PRO CPU has been reset by WDT.
W (56) boot.esp32s3: APP CPU has been reset by WDT.
I (60) boot: Enabling RNG early entropy source...
I (65) boot: Partition Table:
I (67) boot: ## Label            Usage          Type ST Offset   Length
I (74) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (80) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (87) boot:  2 factory          factory app      00 00 00010000 00100000
I (93) boot: End of partition table
I (96) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0c2f0h ( 49904) map
I (116) esp_image: segment 1: paddr=0001c318 vaddr=3fc92600 size=02b38h ( 11064) load
I (119) esp_image: segment 2: paddr=0001ee58 vaddr=40374000 size=011c0h (  4544) load
I (121) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=29d9ch (171420) map
I (167) esp_image: segment 4: paddr=00049dc4 vaddr=403751c0 size=0d3b0h ( 54192) load
I (183) esp_image: segment 5: paddr=0005717c vaddr=600fe100 size=0001ch (    28) load
I (188) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) cpu_start: Multicore app
I (209) cpu_start: Pro cpu start user code
I (209) cpu_start: cpu freq: 160000000 Hz
I (209) app_init: Application information:
I (210) app_init: Project name:     sd_card
I (213) app_init: App version:      1
I (217) app_init: Compile time:     Jul  3 2025 13:55:08
I (222) app_init: ELF file SHA256:  d00f44c9b...
I (226) app_init: ESP-IDF:          v5.4.1
I (230) efuse_init: Min chip rev:     v0.0
I (234) efuse_init: Max chip rev:     v0.99
I (238) efuse_init: Chip rev:         v0.1
I (241) heap_init: Initializing. RAM available for dynamic allocation:
I (248) heap_init: At 3FC95A80 len 00053C90 (335 KiB): RAM
I (253) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (258) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (263) heap_init: At 600FE11C len 00001ECC (7 KiB): RTCRAM
W (269) spi_flash: Octal flash chip is using but dio mode is selected, will automatically switch to Octal mode
I (278) spi_flash: detected chip: mxic (opi)
I (282) spi_flash: flash io: opi_str
W (286) spi_flash: Detected size(32768k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (298) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (304) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (311) main_task: Started on CPU0
I (321) main_task: Calling app_main()
I (321) example: Initializing SD card
I (321) example: Using SDMMC peripheral
I (321) example: Mounting filesystem
I (331) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x8 (TG1WDT_SYS_RST),boot:0x9 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403743c0
--- 0x403743c0: _DoubleExceptionVector at C:/Users/PRIVATE/esp/v5.4.1/esp-idf/components/xtensa/xtensa_vectors.S:564

SPIWP:0xee
Octal Flash Mode Enabled
For OPI Flash, Use Default Flash Boot Mode
mode:SLOW_RD, clock div:1
load:0x3fce2810,len:0x15a0
load:0x403c8700,len:0x4
load:0x403c8704,len:0xd20
load:0x403cb700,len:0x2f00
entry 0x403c8928
I (32) boot: ESP-IDF v5.4.1 2nd stage bootloader
I (32) boot: compile time Jul  3 2025 13:55:43
I (33) boot: Multicore bootloader
I (33) boot: chip revision: v0.1
I (36) boot: efuse block revision: v1.2
I (39) boot.esp32s3: Boot SPI Speed : 80MHz
I (43) boot.esp32s3: SPI Mode       : SLOW READ
I (47) boot.esp32s3: SPI Flash Size : 2MB
W (51) boot.esp32s3: PRO CPU has been reset by WDT.
W (56) boot.esp32s3: APP CPU has been reset by WDT.
I (60) boot: Enabling RNG early entropy source...
I (65) boot: Partition Table:
I (67) boot: ## Label            Usage          Type ST Offset   Length
I (74) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (80) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (87) boot:  2 factory          factory app      00 00 00010000 00100000
I (93) boot: End of partition table
I (96) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0c2f0h ( 49904) map
I (116) esp_image: segment 1: paddr=0001c318 vaddr=3fc92600 size=02b38h ( 11064) load
I (119) esp_image: segment 2: paddr=0001ee58 vaddr=40374000 size=011c0h (  4544) load
I (121) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=29d9ch (171420) map
I (167) esp_image: segment 4: paddr=00049dc4 vaddr=403751c0 size=0d3b0h ( 54192) load
I (183) esp_image: segment 5: paddr=0005717c vaddr=600fe100 size=0001ch (    28) load
I (188) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) cpu_start: Multicore app
I (209) cpu_start: Pro cpu start user code
I (209) cpu_start: cpu freq: 160000000 Hz
I (209) app_init: Application information:
I (210) app_init: Project name:     sd_card
I (213) app_init: App version:      1
I (217) app_init: Compile time:     Jul  3 2025 13:55:08
I (222) app_init: ELF file SHA256:  d00f44c9b...
I (226) app_init: ESP-IDF:          v5.4.1
I (230) efuse_init: Min chip rev:     v0.0
I (234) efuse_init: Max chip rev:     v0.99 
I (238) efuse_init: Chip rev:         v0.1
I (241) heap_init: Initializing. RAM available for dynamic allocation:
I (248) heap_init: At 3FC95A80 len 00053C90 (335 KiB): RAM
I (253) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (258) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (263) heap_init: At 600FE11C len 00001ECC (7 KiB): RTCRAM
W (269) spi_flash: Octal flash chip is using but dio mode is selected, will automatically switch to Octal mode
I (278) spi_flash: detected chip: mxic (opi)
I (282) spi_flash: flash io: opi_str
W (286) spi_flash: Detected size(32768k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (298) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (304) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (311) main_task: Started on CPU0
I (321) main_task: Calling app_main()
I (321) example: Initializing SD card
I (321) example: Using SDMMC peripheral
I (321) example: Mounting filesystem
I (331) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0

These are the logs I get for the third board. These do not repeat.

Code: Select all

--- Warning: GDB cannot open serial ports accessed as COMx
--- Using \\.\COM8 instead...
--- esp-idf-monitor 1.6.2 on \\.\COM8 115200
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H
I (100) esp_image: segment 2: paddr=0001ee58 vaddr=40374000 sizeESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x15 (USB_UART_CHIP_RESET),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403783ea
--- 0x403783ea: esp_cpu_wait_for_intr at C:/Users/PRIVATE/esp/v5.4.1/esp-idf/components/esp_hw_support/cpu.c:64

SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2810,len:0x15a0
load:0x403c8700,len:0x4
load:0x403c8704,len:0xd20
load:0x403cb700,len:0x2f00
entry 0x403c8928
I (26) boot: ESP-IDF v5.4.1 2nd stage bootloader
I (27) boot: compile time Jul  3 2025 14:03:28
I (27) boot: Multicore bootloader
I (27) boot: chip revision: v0.2
I (30) boot: efuse block revision: v1.3
I (33) boot.esp32s3: Boot SPI Speed : 80MHz
I (37) boot.esp32s3: SPI Mode       : DIO
I (41) boot.esp32s3: SPI Flash Size : 2MB
I (45) boot: Enabling RNG early entropy source...
I (49) boot: Partition Table:
I (52) boot: ## Label            Usage          Type ST Offset   Length
I (58) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (65) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (71) boot:  2 factory          factory app      00 00 00010000 00100000
I (78) boot: End of partition table
I (81) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0c2f0h ( 49904) map
I (97) esp_image: segment 1: paddr=0001c318 vaddr=3fc92600 size=02b38h ( 11064) load
I (100) esp_image: segment 2: paddr=0001ee58 vaddr=40374000 size=011c0h (  4544) load
I (104) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=29d9ch (171420) map
I (141) esp_image: segment 4: paddr=00049dc4 vaddr=403751c0 size=0d3b0h ( 54192) load
I (153) esp_image: segment 5: paddr=0005717c vaddr=600fe100 size=0001ch (    28) load
I (159) boot: Loaded app from partition at offset 0x10000
I (159) boot: Disabling RNG early entropy source...
I (171) cpu_start: Multicore app
I (180) cpu_start: Pro cpu start user code
I (180) cpu_start: cpu freq: 160000000 Hz
I (180) app_init: Application information:
I (180) app_init: Project name:     sd_card
I (184) app_init: App version:      1
I (187) app_init: Compile time:     Jul  3 2025 14:02:54
I (192) app_init: ELF file SHA256:  408176f40...
I (197) app_init: ESP-IDF:          v5.4.1
I (200) efuse_init: Min chip rev:     v0.0
I (204) efuse_init: Max chip rev:     v0.99
I (208) efuse_init: Chip rev:         v0.2
I (212) heap_init: Initializing. RAM available for dynamic allocation:
I (218) heap_init: At 3FC95A80 len 00053C90 (335 KiB): RAM
I (224) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (229) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (234) heap_init: At 600FE11C len 00001ECC (7 KiB): RTCRAM
I (240) spi_flash: detected chip: gd
I (243) spi_flash: flash io: dio
W (245) spi_flash: Detected size(16384k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (258) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (264) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (271) main_task: Started on CPU0
I (281) main_task: Calling app_main()
I (281) example: Initializing SD card
I (281) example: Using SDMMC peripheral
I (281) example: Mounting filesystem
I (291) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
I (291) gpio: GPIO[35]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (301) gpio: GPIO[37]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
E (331) sdmmc_common: sdmmc_init_ocr: send_op_cond (1) returned 0x107
E (331) vfs_fat_sdmmc: sdmmc_card_init failed (0x107).
I (331) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
I (341) gpio: GPIO[35]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (351) gpio: GPIO[37]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
E (361) example: Failed to initialize the card (ESP_ERR_TIMEOUT). Make sure SD card lines have pull-up resistors in place.
I (371) main_task: Returned from app_main()


I am hooking up the SD card to a 9 pin SD card module that has internal 10k pullups. Yes, the SD card has been formatted to FAT32. I have used different pin assignments on the third board with no avail.

Any help would be appreciated.

RathiSonika
Espressif staff
Espressif staff
Posts: 29
Joined: Thu Jun 22, 2023 2:58 pm

Re: SDMMC example only works on one board

Postby RathiSonika » Mon Jul 07, 2025 8:35 am

For the ESP32-S3 WROOM-2 board, based on the initial logs, it appears that Octal Flash mode is enabled. According to the documentation https://docs.espressif.com/projects/esp ... components, GPIO35, 36, and 37 are used internally for SPI flash communication. Therefore, these pins cannot be used for SD card communication.
Attachments
Screenshot 2025-07-07 at 10.27.02.png
Screenshot 2025-07-07 at 10.27.02.png (37.83 KiB) Viewed 199 times

bob.mozart
Posts: 10
Joined: Wed Jun 18, 2025 8:29 pm

Re: SDMMC example only works on one board

Postby bob.mozart » Mon Jul 07, 2025 2:40 pm

For the ESP32-S3 WROOM-2 board, based on the initial logs, it appears that Octal Flash mode is enabled. According to the documentation https://docs.espressif.com/projects/esp ... components, GPIO35, 36, and 37 are used internally for SPI flash communication. Therefore, these pins cannot be used for SD card communication.
Thanks! The WROOM-2 board works now, but I'm having the same problem with the third board.

RathiSonika
Espressif staff
Espressif staff
Posts: 29
Joined: Thu Jun 22, 2023 2:58 pm

Re: SDMMC example only works on one board

Postby RathiSonika » Tue Jul 08, 2025 8:40 am

As you've already mentioned that the pull-ups are connected correctly, you can still reverify the pull-up strength by enabling the CONFIG_EXAMPLE_DEBUG_PIN_CONNECTIONS option.
From the logs, I can see that the error is a timeout, which typically points to a few possible causes:
1. Card not inserted properly or poor contact
2. Missing or insufficient pull-up resistors
3. Power supply instability (3.3V not steady)
4. Clock frequency too high for the card or wiring quality
I recommend double-checking the power supply and pull-up resistor setup using the CONFIG_EXAMPLE_DEBUG_PIN_CONNECTIONS option. Also, try lowering the clock frequency to see if that helps stabilize communication.

Who is online

Users browsing this forum: Amazon [Bot], Bytespider, jarda-burian, pdragun and 4 guests