LP CPU errors and warning while starting debug session (Espressive IDE)

NikolaiBaschinski
Posts: 9
Joined: Mon Apr 27, 2026 8:37 pm
Location: Hannover, Germany

LP CPU errors and warning while starting debug session (Espressive IDE)

Postby NikolaiBaschinski » Sun May 03, 2026 8:42 am

Hello everyone,

when I start a debug session with the Espressive IDE, I see errors and warning from the Low Power CPU. How can I disable the debugging of the LP CPU?

Error: [esp32c6.lp.cpu] Timed out after 5s waiting for busy to go low (abstractcs=0x10001002). Increase the timeout with riscv set_command_timeout_sec.
Error: [esp32c6.lp.cpu] Timed out after 5s waiting for busy to go low (abstractcs=0x10001102). Increase the timeout with riscv set_command_timeout_sec.
Error: [esp32c6.lp.cpu] Unexpected read of fp via program buffer.
Warn : [esp32c6.lp.cpu] Register csr_ustatus does not exist, which is part of an SMP group where this register does exist.
...
Error: esp32c6.lp.cpu: Failed to get flash bank (-4)!
Error: [esp32c6.lp.cpu] can't add breakpoint: unknown reason

Thanks
Nikolai

NikolaiBaschinski
Posts: 9
Joined: Mon Apr 27, 2026 8:37 pm
Location: Hannover, Germany

Re: LP CPU errors and warning while starting debug session (Espressive IDE)

Postby NikolaiBaschinski » Sun May 03, 2026 7:36 pm

I have found the problem!

There is a configuration for the target and you can choose the target with or without LP Core. For smooth debugging I also recommend to set the optimization level to -O0 in the menuconfig (compiler options).

Best regards

Nikolai
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