ADC speed?

[ESP_Sprite]

From my notes, the sample rate you have to set for ADC acquisition on the current esp-idf is (actual_sample_rate)/(bits_per_sample).

[mbalci]

From my notes, the sample rate you have to set for ADC acquisition on the current esp-idf is (actual_sample_rate)/(bits_per_sample).

So you mean to read 6ksps from adc 12bit per sample, should i set i2c sampling frequency to the 12x6 = 72khz ?

[ESP_Sprite]

No:
- The sample depth is the I2S sample depth you specify when initializing the driver, most likely you use 16bit/sample.
- You need to divide, so 6000 samples/s and 16 bit means 6000/16=375.

[mbalci]

No:
- The sample depth is the I2S sample depth you specify when initializing the driver, most likely you use 16bit/sample.
- You need to divide, so 6000 samples/s and 16 bit means 6000/16=375.

here is a small test code , i think i2s driver is not reliable.
Whit this code i can read 5.977 (less than 6) times 100 from serial port.
It means 5.977 * 1000(buffer size) = 5977sample per second not 6000!

Second problem is ; if i set SAMPLE_RATE less than some value 6000 , real result is very different than setting.
For example if i set it to 5000, it gives 270000 sample per second .

How can i solve such problems ?

Code: Select all

#include <Arduino.h>
#include "freertos/FreeRTOS.h"
#include "freertos/event_groups.h"
#include "esp_log.h"
#include "driver/i2s.h"
#include "soc/syscon_reg.h"
#include "driver/adc.h"
#include "esp_wifi.h"
#include "esp_event_loop.h"
#include "nvs_flash.h"


uint32_t    SAMPLE_RATE = 6000;
uint32_t    NUM_SAMPLES = 1000;

static QueueHandle_t i2s_event_queue; 

void setup(){
  Serial.begin(115200);
  Serial.printf("%d :",APB_CLK_FREQ);
    i2s_config_t i2s_config ;
    i2s_config.mode =  i2s_mode_t(I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN);
    i2s_config.sample_rate = SAMPLE_RATE;                         
    i2s_config.dma_buf_len = NUM_SAMPLES;                          
    i2s_config.channel_format = I2S_CHANNEL_FMT_ONLY_RIGHT;       
    i2s_config.bits_per_sample = I2S_BITS_PER_SAMPLE_16BIT;
    i2s_config.use_apll = false,
    i2s_config.communication_format = I2S_COMM_FORMAT_I2S;
    i2s_config.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1;
    i2s_config.dma_buf_count = 2;
    i2s_driver_install(I2S_NUM_0, &i2s_config, 1, &i2s_event_queue);
    i2s_set_adc_mode(ADC_UNIT_1, ADC1_CHANNEL_0);
    i2s_adc_enable(I2S_NUM_0); 
}

void loop(){
    uint16_t i2s_read_buff[NUM_SAMPLES];
        system_event_t evt;
        if (xQueueReceive(i2s_event_queue, &evt, portMAX_DELAY) == pdPASS) {
            if (evt.event_id==2) {
                i2s_read_bytes(I2S_NUM_0, (char*)i2s_read_buff,NUM_SAMPLES*2, portMAX_DELAY);
                Serial.write(100);
            }
        }
}

[rfleming]

Your code is exactly what I have been looking for trying to dma an adc buffer. However when I change the input from ADC Chan 0 to ADC chan 5, IO33 that I am using. I appear to have a value of 24575 at 0V and 20480 at 3.3V.

What are these values actually supposed to represent? they're linear and scale between the two voltages but assuming that I had to do some silly math like:
(val-24575)*-1

All the adc values are there, but what am I actually reading? Some sort of I2S scaled raw data that fits into the I2C protocol?

[PA1EJO]

I just got a ESP32 and wanted to know this, the speed depends on the ADC averaging and the ADC bit resolution. So I found the following sample times. Averaging parameter k goes in rows and the bit resolution k goes in columns. All times are in microseconds.

9 10 11 12
1 9.6 9.9 10.1 10.2
2 12.2 12.6 12.7 13.0
4 17.4 17.8 18.5 18.9
8 27.9 28.8 29.9 30.8
16 49.0 50.9 52.9 54.9

I guess everything depends on the clock and bus speeds in the ESP32, but this is what I found. In other words, the ADC sampling frequency can go up to 20 to 100kHz and it mainly depends on the number of averaging cycles by the ADC. ADC averaging cycles and resolution can be modified with the functions analogSetClockDiv(k) and analogReadResolution(j) where "k" is between 1 and 16 cycles and j between 9 and 12 bits.