Allocate 2 buffers in specific address at different memory banks

Baldhead
Posts: 95
Joined: Sun Mar 31, 2019 5:16 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby Baldhead » Thu Nov 07, 2019 8:31 pm

Hi,

In "esp32_technical_reference_manual_en", page 116 this is an explanation and a "figure 13: Linked List Structure".

This structure(figure 13) stay all in hardware ?
How many structure(figure 13) i2s0 have in hardware ?

Thank's.

Baldhead
Posts: 95
Joined: Sun Mar 31, 2019 5:16 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby Baldhead » Thu Nov 07, 2019 8:39 pm

"I2S_OUTLINK_ADDR. The address of first outlink descriptor. (R/W)", page 327 in "esp32_technical_reference_manual_en.pdf".


"I2S_OUTLINK_ADDR" point to the first structure of type of the figure 13 in hardware ????

ESP_Angus
Posts: 1919
Joined: Sun May 08, 2016 4:11 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby ESP_Angus » Fri Nov 08, 2019 7:21 am

Baldhead wrote:
Thu Nov 07, 2019 8:31 pm
In "esp32_technical_reference_manual_en", page 116 this is an explanation and a "figure 13: Linked List Structure".

This structure(figure 13) stay all in hardware ?
How many structure(figure 13) i2s0 have in hardware ?
This is a DMA descriptor. They live in internal RAM (limited only by the amount of RAM you want to use to hold linked list structures.) the I2S peripheral accesses it using DMA, and then accesses the associated buffer using DMA also.
Baldhead wrote:
Thu Nov 07, 2019 8:31 pm
"I2S_OUTLINK_ADDR. The address of first outlink descriptor. (R/W)", page 327 in "esp32_technical_reference_manual_en.pdf".

"I2S_OUTLINK_ADDR" point to the first structure of type of the figure 13 in hardware ????
This is the address in RAM of the structure shown in figure 13. The I2S peripheral will read the structure contents using DMA, process the structure (including any DMA buffer whose address is held in the structure), and then load the next structure which is also located in DRAM at the "next descriptor address" field of the first structure. And so on.

Baldhead
Posts: 95
Joined: Sun Mar 31, 2019 5:16 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby Baldhead » Fri Nov 08, 2019 5:17 pm

Thank's.

Baldhead
Posts: 95
Joined: Sun Mar 31, 2019 5:16 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby Baldhead » Tue Nov 12, 2019 6:01 pm

Hi,

If i only use lcd mode(output, tx), i need to configure something related with input(rx) in "i2s0", "i2s0 fifo" and "i2s0 dma" ?

I think that only registers related com tx mode.

Thank's.

Baldhead
Posts: 95
Joined: Sun Mar 31, 2019 5:16 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby Baldhead » Tue Nov 12, 2019 6:19 pm

Hi again,

I would like to know if i need enable the i2s module with "periph_module_enable(PERIPH_I2S0_MODULE);
", before i execute the code below:

Code: Select all

static void gpio_setup_8bits_out()
{
    printf ( "bus_port_config.i2s_port = %d\n", bus_port_config.i2s_port );      
    printf ( "bus_port_config.ws_io_num = %d\n", bus_port_config.ws_io_num );
    printf ( "bus_port_config.rs_io_num = %d\n", bus_port_config.rs_io_num );
    printf ( "bus_port_config.data_width = %d\n", bus_port_config.data_width );
    for ( int j = 0 ; j < bus_port_config.data_width ; j++ )
    {
        printf ( "bus_port_config.data_io_num[%d] = %d\n", j, bus_port_config.data_io_num[j] );
    }


    gpio_config_t gpio_conf = {0};    
    uint64_t pin_mask = ((uint64_t)1 << bus_port_config.ws_io_num);
    
    uint32_t data_idx = 0;    
    for ( int i = 0 ; i < bus_port_config.data_width ; i++)
    {
        pin_mask |= ((uint64_t)1 << bus_port_config.data_io_num[i] );
    }
    
    gpio_conf.pin_bit_mask = pin_mask;    
    gpio_conf.mode =  GPIO_MODE_OUTPUT;    
    gpio_conf.pull_up_en = 0;    
    gpio_conf.intr_type = GPIO_INTR_DISABLE;
    
    if (gpio_config(&gpio_conf) != ESP_OK)
    {
        return;
    }
    
    data_idx = (bus_port_config.i2s_port == I2S_NUM_0) ? I2S0O_DATA_OUT8_IDX : I2S1O_DATA_OUT8_IDX;
    
    for ( int i = 0 ; i < bus_port_config.data_width ; i++ )
    {
        gpio_matrix_out( bus_port_config.data_io_num[i], data_idx + i, false, false);
    }
    
    if (bus_port_config.i2s_port == I2S_NUM_0)
    {
        gpio_matrix_out(bus_port_config.ws_io_num, I2S0O_WS_OUT_IDX, true, false);
    }
    else 
    {
        gpio_matrix_out(bus_port_config.ws_io_num, I2S1O_WS_OUT_IDX, true, false);
    }    
}

I think that i need to enable the i2s module with "periph_module_enable(PERIPH_I2S0_MODULE);" before i change any i2s module registers.

"periph_module_enable(PERIPH_I2S0_MODULE);" enable power for i2s0 module ?


Thank's.

ESP_Angus
Posts: 1919
Joined: Sun May 08, 2016 4:11 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby ESP_Angus » Wed Nov 13, 2019 10:13 am

Baldhead wrote:
Tue Nov 12, 2019 6:19 pm
I think that i need to enable the i2s module with "periph_module_enable(PERIPH_I2S0_MODULE);" before i change any i2s module registers.
Correct. Not every piece of code here is controlling I2S module (for example, GPIO Matrix configuration), but it can't hurt to do this as a first step.
Baldhead wrote:
Tue Nov 12, 2019 6:19 pm
"periph_module_enable(PERIPH_I2S0_MODULE);" enable power for i2s0 module ?
I think technically it enables the peripheral clock and takes the peripheral out of reset, but same basic idea.

Baldhead
Posts: 95
Joined: Sun Mar 31, 2019 5:16 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby Baldhead » Sun Nov 17, 2019 4:29 am

Hi,

Initially i want to try to make the i2s driver work with dma descriptors without any interrupt enable if it is possible.

After working without interrupt, i want to add an interrupt and try to synchronize the 2 buffers somehow (freeRtos or flags).

In "esp32_technical_reference_manual_en.pdf", page 307, says:
When TX_LEN is less than I2S_TX_DATA_NUM[5:0], the transmitted data, which is buffered in FIFO, has not reached the set threshold and
software can continue feeding data into FIFO.
- How does the dma controller know when tx fifo is full ?
- is it automatic or do i need to set something (maybe interrupt) ???

Thank's.

Baldhead
Posts: 95
Joined: Sun Mar 31, 2019 5:16 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby Baldhead » Sun Nov 17, 2019 4:37 am

Hi ESP_Angus,

In "esp32_technical_reference_manual_en.pdf", page 119, says:
However, unlike the SPI DMA channels, the data size for a single transfer is one word, or four bytes.

* My data buffer are of type uint16_t.
* The i2s lcd mode are 8 bits parallel.
* The dma data size for a single transfer is one word, or four bytes( uint32_t ).
* The data read/write packet length for a FIFO operation is 32 bits.

If i want to write only one byte or a number of bytes that are not multiple of 4 bytes ?

I'm very lost in this part for now.

Could i send my i2s driver in private mode to you ?

Thank's.

Baldhead
Posts: 95
Joined: Sun Mar 31, 2019 5:16 am

Re: Allocate 2 buffers in specific address at different memory banks

Postby Baldhead » Tue Nov 19, 2019 9:27 pm

Hi,

Someone please.

Thank's.

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