Are ULP restrictions gone in silicon V3?

[jsam589]

I keep finding notes in the online documentation stating that revisions 0 and 1 of ESP32 have limitations with respect to ULP and deep sleep. For example, API description of esp_sleep_enable_ext0_wakeup().

In my project I need to be able to set three wakeup reasons at the same time and wake from deep sleep by the first one that occurs.

The ones that I need are: ULP, timer and ext0.

• ULP is to do some frequent, simple GPIO checks of sensors without fully waking ESP32 (because that takes too long and uses too much power).
  timer is for a daily health check that requires full ESP32 bootup
  ext0 is for some interrupt driven wakeups from another type of sensor

I read elsewhere that revision 2 won't be generally released, and I now see evidence that V3 SoC is now in mass production.

QUESTION: Are the limitations gone in V3 which relate to using ULP with deep sleep and ext0, etc.?

Thank you

[boarchuz]

As a workaround you can use the ULP to generate a ext1 interrupt with simple RTC IO operations (I'm not sure if the same pin can be used as both ext1 input and ULP output, or if you need to externally connect two separate pins).

[jsam589]

Thanks for responding! All my sensor GPIOs are among the RTC pins. I may try assigning ext1 wakeup for ESP32 and not ext0. The online docs don't mention caveats if using ext1. But I wonder if it draws extra power to support the ext1 mode?

I will eventually measure the power draw when all three wake sources are configured at the same time, assuming I can get them all working together.

[chegewara]

I believe this is official answer:
https://github.com/espressif/esp-idf/is ... -579384249

[Angus]

That's correct, unfortunately the situation is the same in V3. Will update the comments in the header to match.