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Re: TG0WDT_SYS_RESET after two DEEPSLEEP_RESET

Posted: Sun Jul 09, 2017 8:31 pm
by rudi ;-)
ulp has I2C Master "HW" driver
The ULP co-processor can use a separate I2C controller, located in the RTC domain, to communicate with
external I2C slave devices. RTC_I2C has a limited feature set, compared to I2C0/I2C1 peripherals.

can use a separate I2C controller, located in the RTC domain

HW or SW mode?
:)

Re: TG0WDT_SYS_RESET after two DEEPSLEEP_RESET

Posted: Sun Jul 09, 2017 9:57 pm
by WiFive
HW or SW mode?
HW but I see it is not in the ulp instruction set document yet

Re: TG0WDT_SYS_RESET after two DEEPSLEEP_RESET

Posted: Sun Jul 09, 2017 10:13 pm
by rudi ;-)
HW or SW mode?
HW but I see it is not in the ulp instruction set document yet
( txs WiFive Io12 )

I mean that there was a talk on Bit Bang in the past from Ivan
but i am not more sure "today" the IO15 and IO12 theme is more than embarrassing
something like this must not happen. txs again WIFive - you saw the mistake and you talk to me on a silence way that i did wrong.
txs my friend! i take now a rest - here is 00:15 AM

Re: TG0WDT_SYS_RESET after two DEEPSLEEP_RESET

Posted: Sun Jul 09, 2017 10:27 pm
by WiFive

I mean that there was a talk on Bit Bang in the past from Ivan
That was for SPI

No worries, we here to help each other. I wait for your next conspiracy report. ;)