Hi Baldhead,
While dma is reading from one buffer(i2s dma), my application can write to another buffer at the same time.
This way the bus will not stall.
i still need to think of some way to switch between the two buffers.
I believe the reason the current I2S driver doesn't already support this is that usually this isn't the limiting bandwidth bottleneck, even with the peripheral and the CPU both accessing the same bank. This is because the banks are clocked at the CPU speed, and it's rare for the CPU to be issuing loads or stores to RAM on every instruction, rather than (for example) every second cycle due to incrementing some counter register, testing a branch, etc. And I2S runs at the APB frequency which is usually 2/3x slower than the CPU.
I'd suggest getting to a point where your new driver works, and see if the performance is good enough even with possible bus contention. If you see that you really need this at that point, we can probably find a way for you to make it work.
Static allocated memory is less likely to crash in an application that will almost never restart.
Agree that this is a common axiom of embedded development, especially on smaller microcontroller based systems. Please excuse my bluntness, but consider also that rewriting a lot of stable code from scratch will probably lead to frequent crashes by itself, until the new code is fully debugged. (This isn't addressed at you personally, it's more of a general truism.)
Also i don't know in which addresses are the ram memory banks change.
ie:
buffer_a -> 0x3FFA_E000
buffer_b -> 0x3FFA_E000 + 32768
Consider the address modulo 0x8000 (32KB). So in this case the buffers would be partially in the same bank.
For example, if i enable watchdog, and watchdog reset based in some kind of reset set by me from the options provided, and i want to restore the state of my application before reset, as ram is not reset, i only restore the values from ram.
RAM is not reset by the hardware, but app stills needs to be loaded into RAM by the ROM & IDF bootloaders and these both use some RAM to do that. So there is no concrete guarantee that DRAM won't be overwritten during the early boot process.
You can use the _NOINIT_ATTR to prevent static memory being rewritten (or re-zeroed) during the boot process. This is only guaranteed to work as a performance tweak though (startup code doesn't waste clock cycles zeroing the buffers), rather than a guarantee the values will still be there after reset:
https://docs.espressif.com/projects/esp ... m-data-ram
Values which absolutely need to be persisted between soft resets can be placed in RTC memory.
With inline assembly i could allocate the buffer with static memory allocation ?
This isn't necessary. Static buffers can be allocated using standard C approaches.
Or should i switch the 2 software linked list head by changing this pointer: "I2S_OUTLINK_ADDR" The address of first outlink descriptor. (R/W), in register I2S_OUT_LINK_REG (0x0030) ?
Correct. The descriptors themselves live in DRAM, the address registers tell the peripheral where to access them.