When will Espressif release a ESP32 with 8MB/64mb PSRAM?

wesam.co
Posts: 7
Joined: Mon Oct 09, 2017 7:14 pm

When will Espressif release a ESP32 with 8MB/64mb PSRAM?

Postby wesam.co » Mon Oct 30, 2017 4:07 pm

in the ESP32 Technical Reference Manua pdf I read that up to 8MB PSRAM is viable,
"Due to this address mapping, the ESP32 can address up to 16 MB External Flash and 8 MB External SRAM."
these extra 4MBs are very necessary for many application that can run on the ESP32 with MicroPython,
and every developer would love to have 8MBs of RAM with the ease of development of Python,
with 8MB you can run any optimizing runtime for any language easily,
there are as many as orders of magnitude Python, Javascript and Lua developers as there are C/C++ developers, and at least 1 order of magnitude as Arduino framework developers, so you'll open up to a much bigger market and sales will skyrocket..
240Mhz top frequency is perfect already, we will take advantage of it all with 8MBs PSRAM.

Enter the mainstream Electronics beginners market, Espressif, you haven't done that yet..
thanks ;)

WiFive
Posts: 2624
Joined: Tue Dec 01, 2015 7:35 am

Re: When will Espressif release a ESP32 with 8MB/64mb PSRAM?

Postby WiFive » Mon Oct 30, 2017 5:01 pm

Up to 8 MB of external flash/SRAM memory are mapped onto the CPU data space,
This means 4mb flash + 4mb sram

wesam.co
Posts: 7
Joined: Mon Oct 09, 2017 7:14 pm

Re: When will Espressif release a ESP32 with 8MB/64mb PSRAM?

Postby wesam.co » Mon Oct 30, 2017 7:27 pm

WiFive wrote:
Up to 8 MB of external flash/SRAM memory are mapped onto the CPU data space,
This means 4mb flash + 4mb sram
http://espressif.com/sites/default/file ... ual_en.pdf
on page 20, under (System and Memory/Features/External Memory):
"
Off-chip SPI memory can be mapped into the available address space as external memory. Parts of the
embedded memory can be used as transparent cache for this external memory.
– Supports up to 16 MB off-Chip SPI Flash.
– Supports up to 8 MB off-Chip SPI SRAM
"
sorry, this doesn't seem to me to mean that?

page 25: "1.3.3 External Memory
The ESP32 can access external SPI flash and SPI SRAM as external memory. Table 5 provides a list of external
memories that can be accessed by either CPU at a range of addresses on the data and instruction buses. When
a CPU accesses external memory through the Cache and MMU, the cache will map the CPU’s address to an
external physical memory address (in the external memory’s address space), according to the MMU settings. Due
to this address mapping, the ESP32 can address up to 16 MB External Flash and 8 MB External SRAM.
"

more in detail info starting on page 477 under "External RAM"

WiFive
Posts: 2624
Joined: Tue Dec 01, 2015 7:35 am

Re: When will Espressif release a ESP32 with 8MB/64mb PSRAM?

Postby WiFive » Tue Oct 31, 2017 2:57 am

Yes I know. My quote is from the datasheet not trm. If you look at table 5 you can see 8mb address space total. Under what circumstance you could use both for psram I don't know.

wesam.co
Posts: 7
Joined: Mon Oct 09, 2017 7:14 pm

Re: When will Espressif release a ESP32 with 8MB/64mb PSRAM?

Postby wesam.co » Tue Oct 31, 2017 11:05 pm

Looking forward to a reply from and discussion with our friends at Espressif.

ESP_Sprite
Posts: 2813
Joined: Thu Nov 26, 2015 4:08 am

Re: When will Espressif release a ESP32 with 8MB/64mb PSRAM?

Postby ESP_Sprite » Wed Nov 01, 2017 5:57 pm

At the moment, the max achievable amount in practice is 4MiB, because this is the size of the memory window the PSRAM can be mapped into. In theory, the hardware does support 8MiB of PSRAM just fine, but it would have the restriction that only 4MiB of it can be accessed at the same time (see the TRM, page 477, or search for 'the page size is 32 KB and the MMU is able to map 256 physical pages into the virtual address space'). Theoretically, we could add support for a bank switching-like scheme for external RAM, but it would be complex and clash really badly with the expectations users have of RAM, needing programs to be entirely rewritten to be aware of the mmu rewriting antics needed, hence the number in all other documentation is 4MiB.

Who is online

Users browsing this forum: Baidu [Spider], Bing [Bot] and 17 guests