ESP32 Forum

Hi There

I have to do a low power project (cpu always running, don't care sleep) with 15 GPIO and I want to keep using ESP as I love these chips and I am familiar with them. the project it's currently working on a esp32-WROOM-32E @ 10 Mhz , drawing (just the wroom module) ~13mA while running the code . I was expecting something lower but not sure if this test board as is very very old may be somewhat less efficient than the latest revisions.

Ideally looking for a drop-in replacement but I can deal if need to rewire some gpios or the frootpint.
From what I have learned it seems that I have 3 candidates

ESP32-S2
LX7 that it's rated as more enficient than LX6 and also 1 unique core so I presume I will necessarily get better consumption.

ESP32-C2
Seems to be a very low power option, but unfortunately there are not enough GPIOs.

ESP32-H2
It seems to be the lowest power option of all, but as it is a very new chip, there is hardly any information, examples, (arduino is only in beta phase yet) and in general, I find it very risky to trust a chip so early on.

If anyone has any further recommendations I would be very grateful, as well as sharing consumption while the CPU is working, my intention is to underclock as much as possible and there is no intention of using WIFI/BLE at any time.

Saludos

ESP32-S2 is the most suitable candidate considering your need for 15 GPIOs and lower power consumption.

Using the RISC-V ULP of an ESP32-S3 may be worth looking into.

Using the RISC-V ULP of an ESP32-S3 may be worth looking into.

Thanks for the info. I didn't know that feature, however as I'm using a general purpose code (spi, great memory arrays, i2c, gpios, loops etc..) not sure if ULP can handle that.

ESP32-S2 is the most suitable candidate considering your need for 15 GPIOs and lower power consumption.

Yeah, Just looking I found this post where it seems that it is not worth using one module over another for consumption reasons, there is very little to none difference at low speeds

Using the RISC-V ULP of an ESP32-S3 may be worth looking into.

however as I'm using a general purpose code (spi, great memory arrays, i2c, gpios, loops etc..) not sure if ULP can handle that.

"Normal" C code and GPIO access works well on the RISC-V ULP, as does limited hardware I2C. RAM is not huge: max. 8KB in total for the ULP code and all data. So the ULP may in fact not be powerful enough for you.

If you haven't already, check out light sleep mode; there's also an "automatic light sleep" option with which light-sleeping can work pretty much invisibly in the "background" whenever the chip has nothing to do for a few dozen milliseconds or longer.

"Normal" C code and GPIO access works well on the RISC-V ULP, as does limited hardware I2C. RAM is not huge: max. 8KB in total for the ULP code and all data. So the ULP may in fact not be powerful enough for you.

Note that if you run into those issues, maybe the C6 is a better option. You get twice the RAM (16KiB) and the ULP core in that chip is an order of magnitude faster than the one in the S2/S3.

If you haven't already, check out light sleep mode; there's also an "automatic light sleep" option with which light-sleeping can work pretty much invisibly in the "background" whenever the chip has nothing to do for a few dozen milliseconds or longer.

Thanks for that tip, I was no aware about that feature that I will definitely try

Note that if you run into those issues, maybe the C6 is a better option. You get twice the RAM (16KiB) and the ULP core in that chip is an order of magnitude faster than the one in the S2/S3.

By the way, I'm trying at all costs to avoid the ~350mA spikes on startup which I assume are caused by the Partial RF calibration. I already implement all Espressif recomendation for a fast boot saving a lot of energy but the spikes still there... Do you know if there is a way to config (or missconfig) the bootload in order to keep WiFi stuff always disabled, including the calibration? Or pehapas force to boot at <80Mhz in order to not power up the WiFi

By the way, I'm trying at all costs to avoid the ~350mA spikes on startup which I assume are caused by the Partial RF calibration. I already implement all Espressif recomendation for a fast boot saving a lot of energy but the spikes still there... Do you know if there is a way to config (or missconfig) the bootload in order to keep WiFi stuff always disabled, including the calibration? Or pehapas force to boot at <80Mhz in order to not power up the WiFi

WiFi cal only happens when you (manually) start the WiFi subsystem. If you don't touch WiFi, it should never cal.