ESP32 Forum

Does someone know if the ESP32-P4 has a single FPU shared among the two HS CPUs or if each HS CPU has its own FPU, so 2 FPUs?
Thx.

Hi rma-31,
According to the preliminary version of the ESP32-P4 technical reference manual:
Each HP core implements the RISC-V standard single-precision floating-point instruction set extension ”RV32F”. The RV32F extension also provides its own register file and various CSRs for configuration and flag checking.

That means each core has its own I guess, great