RSR.CCOUNT on Espressif's RISCs?
Posted: Fri Jul 18, 2025 9:52 am
Hello everyone!
On Xtensa-based CPUs one can use "rsr.ccount" assembler instruction to read CPU cycles count register.
Do we have something like that on C3, C6, P4 ?
Thanks!
On Xtensa-based CPUs one can use "rsr.ccount" assembler instruction to read CPU cycles count register.
Do we have something like that on C3, C6, P4 ?
Thanks!