Apologies for the delayed response; I got sidetracked with writing firmware for other system components so that I could make progress.
I am not at all sure what is happening, or even what is supposed to happen, so let me describe some experiments I conducted. For all of these, the ESP32-C6 still has the ESP32-C6-4MB-AT-V4.1.0.0 factory image I programmed it with.
I connect the DevKit-C1 UART port to my PC and open it enumerates as Silicon Labs CP210x USB to UART Bridge (COM4). I launch Tera Term 5, configure it for 115200 baud, 8 data bits, no parity, 1 stop bit, and no flow control. I have the Terminal set to transmit CRLF New-Line. I then connect to COM 4 and immediately get the following:
ESP-ROM:esp32c6-20220919
Build:Sep 19 2022
rst:0x1 (POWERON),boot:0xc (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:2
load:0x40875720,len:0x16b8
load:0x4086c110,len:0xe70
load:0x4086e610,len:0x30e8
entry 0x4086c11a
I (23) boot: ESP-IDF v5.4.1-643-g8ad0d3d8f2-dirty 2nd stage bootloader
I (24) boot: compile time Jul 18 2025 10:02:38
I (24) boot: chip revision: v0.2
I (25) boot: efuse block revision: v0.3
I (29) boot.esp32c6: SPI Speed : 80MHz
I (33) boot.esp32c6: SPI Mode : DIO
I (37) boot.esp32c6: SPI Flash Size : 4MB
I (40) boot: Enabling RNG early entropy source...
I (45) boot: Partition Table:
I (47) boot: ## Label Usage Type ST Offset Length
I (54) boot: 0 otadata OTA data 01 00 0000d000 00002000
I (60) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (67) boot: 2 nvs WiFi data 01 02 00010000 0000e000
I (73) boot: 3 at_customize unknown 40 00 0001e000 00042000
I (80) boot: 4 ota_0 OTA app 00 10 00060000 001d0000
I (86) boot: 5 ota_1 OTA app 00 11 00230000 001d0000
I (93) boot: End of partition table
I (96) esp_image: segment 0: paddr=00060020 vaddr=42170020 size=2be00h (179712) map
I (137) esp_image: segment 1: paddr=0008be28 vaddr=40800000 size=041f0h ( 16880) load
I (141) esp_image: segment 2: paddr=00090020 vaddr=42000020 size=1644ach (1459372) map
I (411) esp_image: segment 3: paddr=001f44d4 vaddr=408041f0 size=1c664h (116324) load
I (436) esp_image: segment 4: paddr=00210b40 vaddr=40820860 size=04558h ( 17752) load
I (440) esp_image: segment 5: paddr=002150a0 vaddr=50000000 size=0007ch ( 124) load
I (448) boot: Loaded app from partition at offset 0x60000
I (449) boot: Disabling RNG early entropy source...
I (946) at-init: at param mode: 1
I (1033) at-uart: AT cmd port:uart1 tx:7 rx:6 cts:5 rts:4 baudrate:115200
I (1034) at-init: module_name: ESP32C6-4MB
I (1035) at-init: max tx power=78, ret=0
I (1037) at-init: v4.1.0.0 (gitlab)
I try entering AT+GMR, but nothing changes in the terminal window. There is no character echo, and the UART appears to be unresponsive.
I then disconnect from COM 4 and unplug the cable to the DevKit-1C UART port. I now connect the kit's USB port to my PC. It enumerates as USB Serial Device (COM3).
At first, COM3 appears to be dead — no output and no response. I turn off the PC's USB port and Tera Term indicates that it is now disconnected. But when I turn the USB port back on, it outputs the following:
I (416) esp_image: segment 3: paddr=001f44d4 vaddr=408041f0 sizeI (956) at-init: at param mode: 1
I (1041) at-uart: AT cmd port:uart1 tx:7 rx:6 cts:5 rts:4 baudrate:115200
I (1042) at-init: module_name: ESP32C6-4MB
I (1043) at-init: max tx power=78, ret=0
I (1045) at-init: v4.1.0.0 (gitlab)
W (1202) at-common: write dlen:0
It then seems unresponsive.
Finally, I disconnected the DevKit from the PC, attached a 5 V power supply to J1 pin 14 (5V), and to J1 pin 15 (G). I also attached an FTDI Chip TTL-232RG-VIP-WE cable from my PC to the DevKit J1 pin 1 (3V3), J3 pin 1 (G), J3 pin 2 (TX), and J3 pin 3 (RX).
The FTDI cable enumerated as USB Serial Port (COM6). I launched Tera Term 5, configured it for 115200 baud, 8 data bits, no parity, 1 stop bit, no flow control, and then opened port COM6. On applying power to the DevKit, it outputs the following:
ESP-ROM:esp32c6-20220919
Build:Sep 19 2022
rst:0x1 (POWERON),boot:0xc (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:2
load:0x40875720,len:0x16b8
load:0x4086c110,len:0xe70
load:0x4086e610,len:0x30e8
entry 0x4086c11a
I (23) boot: ESP-IDF v5.4.1-643-g8ad0d3d8f2-dirty 2nd stage bootloader
I (24) boot: compile time Jul 18 2025 10:02:38
I (24) boot: chip revision: v0.2
I (25) boot: efuse block revision: v0.3
I (29) boot.esp32c6: SPI Speed : 80MHz
I (33) boot.esp32c6: SPI Mode : DIO
I (37) boot.esp32c6: SPI Flash Size : 4MB
I (40) boot: Enabling RNG early entropy source...
I (45) boot: Partition Table:
I (47) boot: ## Label Usage Type ST Offset Length
I (54) boot: 0 otadata OTA data 01 00 0000d000 00002000
I (60) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (67) boot: 2 nvs WiFi data 01 02 00010000 0000e000
I (73) boot: 3 at_customize unknown 40 00 0001e000 00042000
I (80) boot: 4 ota_0 OTA app 00 10 00060000 001d0000
I (86) boot: 5 ota_1 OTA app 00 11 00230000 001d0000
I (93) boot: End of partition table
I (96) esp_image: segment 0: paddr=00060020 vaddr=42170020 size=2be00h (179712) map
I (137) esp_image: segment 1: paddr=0008be28 vaddr=40800000 size=041f0h ( 16880) load
I (141) esp_image: segment 2: paddr=00090020 vaddr=42000020 size=1644ach (1459372) map
I (411) esp_image: segment 3: paddr=001f44d4 vaddr=408041f0 size=1c664h (116324) load
I (436) esp_image: segment 4: paddr=00210b40 vaddr=40820860 size=04558h ( 17752) load
I (440) esp_image: segment 5: paddr=002150a0 vaddr=50000000 size=0007ch ( 124) load
I (448) boot: Loaded app from partition at offset 0x60000
I (449) boot: Disabling RNG early entropy source...
I (946) at-init: at param mode: 1
I (1032) at-uart: AT cmd port:uart1 tx:7 rx:6 cts:5 rts:4 baudrate:115200
I (1033) at-init: module_name: ESP32C6-4MB
I (1034) at-init: max tx power=78, ret=0
I (1036) at-init: v4.1.0.0 (gitlab)
After that, I got nothing more, and the port was unresponsive.
I then installed Advanced Serial Port Monitor (
https://www.aggsoft.com/serial-port-monitor.htm) to see what it would display. After extensive experimentation, I discovered that the RTS and DTR lines are asserted by default. When either port is connected to a PC using a USB serial cable, it triggers the ESP32 to output the data shown above. Toggling RTS also does the same.
I am now totally at a loss for how to proceed. I have a project with thousands of installations, where I have specified this part for use based on its wide acceptance. I know it should be able to do work, but I can't even talk to it so I can develop the application, even though programming the part went well.