ESP32-P4 Dedicated IO Clarification
Posted: Fri Oct 24, 2025 9:13 am
Thank you for the updated reference manual. As I often have special cases that are not covered by the regular drivers it is a great help.
The new release includes the Dedicated IO as chapter 1.13.2. I am under the impression that it was copied from another chip and not modified. Based on the values a chip with 22 gpios and only one core.
Beside this it refereces to the table 9.12-1for the matrix configuration. There are 32 entries for core_gpio_in_pad_in and 30 for core_gpio_out_pad_out. But with just 8 signals per core core supported only 16 are useable at most. Therefore I wonder what the others are used for?
The new release includes the Dedicated IO as chapter 1.13.2. I am under the impression that it was copied from another chip and not modified. Based on the values a chip with 22 gpios and only one core.
Beside this it refereces to the table 9.12-1for the matrix configuration. There are 32 entries for core_gpio_in_pad_in and 30 for core_gpio_out_pad_out. But with just 8 signals per core core supported only 16 are useable at most. Therefore I wonder what the others are used for?